Prototype Implementation of Two Efficient Low-Complexity Digital Predistortion Algorithms

Abstract

Predistortion (PD) lineariser for microwave power amplifiers (PAs) is an important topic of research. With larger and larger bandwidth as it appears today in modern WiMax standards as well as in multichannel base stations for 3GPP standards, the relatively simple nonlinear effect of a PA becomes a complex memory-including function, severely distorting the output signal. In this contribution, two digital PD algorithms are investigated for the linearisation of microwave PAs in mobile communications. The first one is an efficient and low-complexity algorithm based on a memoryless model, called the simplicial canonical piecewise linear (SCPWL) function that describes the static nonlinear characteristic of the PA. The second algorithm is more general, approximating the pre-inverse filter of a nonlinear PA iteratively using a Volterra model. The first simpler algorithm is suitable for compensation of amplitude compression and amplitude-to-phase conversion, for example, in mobile units with relatively small bandwidths. The second algorithm can be used to linearise PAs operating with larger bandwidths, thus exhibiting memory effects, for example, in multichannel base stations. A measurement testbed which includes a transmitter-receiver chain with a microwave PA is built for testing and prototyping of the proposed PD algorithms. In the testing phase, the PD algorithms are implemented using MATLAB (floating-point representation) and tested in record-and-playback mode. The iterative PD algorithm is then implemented on a Field Programmable Gate Array (FPGA) using fixed-point representation. The FPGA implementation allows the pre-inverse filter to be tested in a real-time mode. Measurement results show excellent linearisation capabilities of both the proposed algorithms in terms of adjacent channel power suppression. It is also shown that the fixed-point FPGA implementation of the iterative algorithm performs as well as the floating-point implementation.

On Segmented Predistortion for Linearization of RF Power Amplifiers

“…Piecewise linear functions and in particular simplicial canonical piecewise linear (SCPWL) functions were first applied to approximate functions of a single real-variable variable such as those presented in Sec. 4, in static cases to model AM/AM and AM/PM characteristics of quasi-memoryless PA [43], [44] or in dynamic cases to represent nonlinearities functions in Volterra based models [45]. Then they were also used to model functions of complex input [46] with the name memory-SCPWL functions.…”

Fifth and Sixth-Order Iterative Algorithms Without Derivatives for Solving Non-Linear Equations

“…Modern applications have high computational requirements in a many variety of fields, including financial analysis, data mining, medical imaging, and scientific computation. In many applications, implementations on FPGA report better results and computation times than software implementation methods, such as Newton-Rapshon, Non-Restoring Square Root [10], Bisection, Lanczos [11] and secant Volterra methods [1], among others. Future work will be needed to implement the proposed methods on high-performance FPGA-based systems for obtaining implementation results.…”

A special complex-valued simplicial canonical piecewise linear function for amplifier and predistorter nonlinearity representation

“…It replaces the global nonlinear function by a series of linear subfunctions that are defined in properly partitioned subregions of the original definition region of the nonlinear function. Recently, a piecewise linear function known as the simplicial canonical piecewise linear (SCPWL) function has been proposed for modeling power amplifier and digital predistorter characteristics [1,2,3].…”