In 1965 Gordon Moore postulated that the transistor density of a computer chip would double every year or so, which has held reasonably true up to this point in time. With the increase in transistor density, the data throughput of intra-and inter-chip communication has also increased dramatically, but has currently reached a plateau. The ever-increasing data transfer rates are quickly approaching speeds that challenge the material limits of today's technology. Several problems need to be addressed to significantly increase data transfer rates in chip-to-chip digital communication on printed circuit boards (PCB).Currently data rates have reached 3.125 Gb/s on standard circuit board interconnect. Until optical circuit board interconnect becomes a reality, current interconnect technology requires improvements to exceed the current throughput limits. These improvements could employ digital or analog designs to compensate for distortions and interferences whose characteristics are well known. The design process is challenging because of the extremely high data rates present in high-speed systems. Both digital and analog devices are believed to have fast enough characteristics to correct for certain signal distortions.This thesis addresses problems associated with dc wander and crosstalk by employing digital components to provide compensation in the circuit. Two circuits have been designed with simple architectures which are tested with simulations to verify their operation. This thesis gives a detailed account of the design of the two circuits and reports the results of the simulations. The designs demonstrate improved performance over the standard system.
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ACKNOWLEDGEMENTSThe researcher wishes to acknowledge and thank his two co-supervisors Dr. Ron Bolton and Prof. David Dodds, and his extremely knowledgeable colleague Eric Pélet.Without their expertise, guidance and advice, the goals would have taken much longer to reach.