Pull-In Voltage and Fabrication Yield Analysis of All-Metal-Based Nanoelectromechanical Switches

Abstract

We designed a one-mask process for all-molybdenum-based laterally actuated nanoelectromechanical switches. The damascene-like process is designed to ensure a smooth, high-aspect ratio, and metal-to-metal mechanical contact. Based on the statistical study of 800 devices, very high process yield can be achieved for fixed-fixed beam devices by selecting suitable device dimensions, i.e., the beam length versus beam width ratio should be <70 and the ratio of actuation gap to contact gap should be >1.5. Typical failure modes are also discussed.[ 2014-0391]Index Terms-Switches, nanoelectromechanical systems, electrostatic devices. I. INTRODUCTIONE LECTROSTATICALLY actuated micro/nano electromechanical system (M/NEMS) switches have been attracting attention for their excellent switching properties including zero-leakage current, abrupt switch behavior and potential to operate in high temperature [1]- [5]. These unique properties make NEMS switch a strong candidate for ultra-low power electronics and harsh environment integrated circuit (IC) [6]-[10].On the other hand, it would be difficult for NEMS switches to entirely replace CMOS transistors in high performance ICs, since NEMS switches have lower a operating frequency due to their large mechanical delay. To avoid the low speed NEMS switches slowing down the circuit and fully utilize their zero leakage properties, several applications have been proposed for NEMS-CMOS integration, by using NEMS switches to replace speed insensitive elements in field programmable gate array [11]-[15], power gating [16]-[18] and static random access memory [19]-[21]. Studies indicate that introducing NEMS switches would largely reduce the power consumption of the whole NEMS-CMOS IC. To realize hybrid NEMS-CMOS circuit [22], [23], directly fabricating NEMS switches on top of CMOS layer would be a realistic and cost-effective technique. The semiconductor industry has developed air gap back end process [24] which is most suitable for the NEMS-CMOS hybrid circuit. Manuscript

Review: Electrostatically actuated nanobeam-based nanoelectromechanical switches – materials solutions and operational conditions

“…However, metal-based NEM components with nanometre-scale dimensions are difficult to fabricate due to their high intrinsic stress, large surface roughness and grain size, inherent porosity, and low strength. To date, there are rather few reports on metallic NEM switches [ 17 – 18 114 – 115 ].…”

“…An all-molybdenum 3T NEM switch was fabricated by a top-down approach by filling Mo into a SiO 2 mold, prepared by a one-mask photolithography process. This process was followed by etching of the SiO 2 sacrificial layer for the release of Mo switching structures [ 19 , 115 ]. Switches with 300 nm thick and 500–700 nm wide switching elements with lengths 28–40 µm showed jump-in voltages in the range of 12–24 V for separation gaps of 100–150 nm.…”

“…Switches with 300 nm thick and 500–700 nm wide switching elements with lengths 28–40 µm showed jump-in voltages in the range of 12–24 V for separation gaps of 100–150 nm. Cycling tests performed with Mo-based switches showed 100% repeatable operation of the switch with aforementioned dimensions of the switching element [ 115 ], as well as stable operation up to 20,000 switching cycles in vacuum at 300 °C [ 19 ]. The low subthreshold swing of 2.5 mV/decade was kept until the very end of the cycling tests [ 19 ].…”

A 0.2 V Micro‐Electromechanical Switch Enabled by a Phase Transition

“…[3,5,7,[11][12][13][14] Research efforts so far have been focused on lowering the operating voltages by either improving the device design or reducing the device size. [3,15,16] A body bias method has also been introduced to reduce the gate voltage, but it fails to decrease the overall operating voltage because the body bias voltage is usually high (≈4-12 V). [4,[17][18][19] Currently, sub 1 V switches without body bias are mostly based on nano-electromechanical (NEM) technologies using ultrasmall air gaps or ultrathin piezoelectric layers.…”

“…However, to integrate MEM switches into current systems, the challenge of matching their operating voltages with the CMOS levels (<1 V) with good reliability must be addressed . Research efforts so far have been focused on lowering the operating voltages by either improving the device design or reducing the device size . A body bias method has also been introduced to reduce the gate voltage, but it fails to decrease the overall operating voltage because the body bias voltage is usually high (≈4–12 V) .…”