Pulsar: A Superconducting Delay-Line Memory

Abstract

Logic and fabrication advancements have renewed interest in superconductor electronics for energy-efficient computing and quantum control processors. One of the most challenging obstacles ahead is the lack of a scalable superconducting memory technology. Here, we present a superconducting delay line memory based on Passive Transmission Lines built with high kinetic inductors. The developed memory system is fully superconducting; operates at speeds ranging from 20 GHz to 100 GHz with ±24% and ±13% bias margins, respectively; and exhibits data densities in the 10s of Mbit/cm 2 with the MIT Lincoln Laboratory SC2 fabrication process. Moreover, its circulating nature allows the miniaturization of control circuitry, the elimination of data splitting and merging, and the inexpensive implementation of both sequential-access and content-addressable memories. Further advancements to high kinetic inductor fabrication processes indicate even greater data densities of 100s of Mbit/cm 2 and beyond.

Disentangling superconductor and dielectric microwave losses in sub-micron $\rm Nb$/$\rm TEOS-SiO_2$ interconnects using a multi-mode microstrip resonator

“…11,18,19 On the other hand, they can form a passive transmission line, to propagate low-bandwidth (35-50 GHz) data with 7-10 SFQ pulses per bit, 19 or to propagate high-bandwidth (350 GHz) data with single SFQ pulse per bit, 20,21 or to produce a delay-line memory. 22 The power dissipation is governed by the superconductor and dielectric loss, and is inversely proportional to a transmission line resonator figure of merit, quality factor (Q-factor). 23 Similarly, the propagation distance of SFQ pulse scales with the Q-factor.…”