2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS) 2020
DOI: 10.1109/icecs49266.2020.9294788
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Pulse Design Method for Complexity Reduction of IEEE IR-UWB Pulse Synthesizers

Abstract: This paper presents a sample & hold pulse envelope synthesis method and shows that only 5 (resp. 7) samples are necessary to respect the sidelobes rejection in adjacent channels of 18dB (resp. 20dB) required by the IEEE 802.15.4 (resp. 802.15.6) standard if a sample & hold Gaussian envelope is used. These required numbers of samples, which enable complexity reduction of IR-UWB emitters for IEEE standards, are validated using measurement results of a pulse synthesizer presented in this paper since a sidelobes r… Show more

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Cited by 3 publications
(2 citation statements)
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“…Nevertheless, this envelope is not easy to generate from the electronic point of view. However, it can be noted that other pulse envelopes allow high sidelobes rejection level such as the Gaussian one [21] or the cardinal sine one.…”
Section: B Uwb Pulses Envelope Characteristicsmentioning
confidence: 99%
“…Nevertheless, this envelope is not easy to generate from the electronic point of view. However, it can be noted that other pulse envelopes allow high sidelobes rejection level such as the Gaussian one [21] or the cardinal sine one.…”
Section: B Uwb Pulses Envelope Characteristicsmentioning
confidence: 99%
“…Among the IR-UWB pulse generator reported architectures, one uses voltage-controlled oscillators (VCO) combined with a shaper circuit [5], meanwhile, other uses baseband pulses combiner, using delay cells [6]. Both works target an IR-UWB pulse generator whose generated pulse shape fits in spectral masks defined by the IEEE 802.15.4 standard, that defines 15 channels divided in 3 groups and whose bandwidth is between 499 MHz and 1355 MHz (Fig.…”
Section: Introductionmentioning
confidence: 99%