PVD-High-K Gate Dielectrics With Fusi Gate and Influence of Pda Treatment on on-State Drive Current

Niwa, Miki; Mitsuhashi, R.; Yamamoto, Kazuhiko; Hayashi, Shigenori; Rothchild, Aude; Kubicek, Stefan; DeGendt, S.; Biesemans, S.

doi:10.1007/1-4020-4367-8_1

Cited by 2 publications

(3 citation statements)

References 4 publications

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“…In any case, it should be noted that in addition to the poly depletion, an unknown additional reduction in EOT happens when the poly Si is replaced by NiSi-FUSI gate on SiON. Also the EOT reduction is more remarkable for HfO 2 gate dielectric than for SiON [54]. Although, these discussions related to the PMOS, similar trends are found for NMOS.…”

Section: Eot Dependence On Gate Electrodesupporting

confidence: 73%

“…4.53, but is focused on the HfO 2 dielectric with/without SiN capping (i.e., FUSI/(SiN)/HfO 2 ). In the case of SiN capped HfO 2 , the EOT of PMOS decreases as well but by 0.5 nm (from 1.8 to 1.3 nm); in contrast, the V th is found to be unchanged, which implies that it is not enough to unpin the Fermi Level Pinning (FLP) by the NiSi-FUSI [54]. For the case without the SiN cap, the EOT is decreased further by 0.7 nm (from 1.8 to 1.1 nm) and the corresponding V th reveals unchanged value indicating NiSi-FUSI is not capable of unpinning the FLP regardless of the SiN capping on top of HfO 2 .…”

Section: Eot Dependence On Gate Electrodementioning

confidence: 70%

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Hf-Based High-k Gate Dielectric Processing

Niwa

2013

High Permittivity Gate Dielectric Materials

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This chapter focuses on the processing of Hf-based high-k gate dielectric film and its device fabrication to improve its electrical properties. First, the formation process of Hf-based high-k dielectric thin film is introduced followed by detail study of these films from the materials science point of view, such as its crystallization and its control, carrier trapping and doping effect on the bulk high-k film. Finally, the device processing of the Field Effect Transistor including the CMOSFET with Hf-based high-k gate dielectric and metal gate electrode is discussed. Introductory RemarksIn accordance with the requirement of CMOS (Complimentary Metal Oxide Semiconductor) scaling, replacement of thermally grown SiO 2 gate dielectric with other dielectric materials of high dielectric constant (k) has become imperative. However, replacing of the SiO 2 conduces to a variety of other disadvantages and is not as simple as it may seem. Many challenges caused by different dielectric properties are to be conquered before the high-k dielectrics find practical use in industry. In spite of such difficult situations, thanks to intensive efforts, these insuperable difficulties have been solved gradually and finally CMOS with high-k/ metal gate stack for high performance application has been in commercial production in 2007 for the first time [1]. However, still many issues were left unsolved and have been addressed continuously to overcome them. Most of them come from the fact that Hf-based high-k dielectric materials are thermodynamically unstable and the nature of the electrovalent (ionic)-bonded HfO 2 is quite M. Niwa

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Section: Eot Dependence On Gate Electrodesupporting

confidence: 73%

Section: Eot Dependence On Gate Electrodementioning

confidence: 70%

Hf-Based High-k Gate Dielectric Processing

Niwa

2013

High Permittivity Gate Dielectric Materials

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“…Undoped NiSi gates show a mid-gap workfunction, as evidenced, for example, from V t shift by ;0.5 V from n þ Si and p þ Si controls (Figure 15). Several techniques have been proposed to adjust the workfunction of FUSI gates toward band edges: 1) pre-doping of polySi gates with common n þ and p þ dopants before gate silicidation [126, 129-132, 135, 140, 141, 144]; 2) changing the composition of FUSI gates, in particular alloying Ni with other elements (for example, Pt or Ge for p-FET shifts and Al for n-FETs) [130,131,133,137,140]; 3) using different silicide phases [21,140,143,144];…”

Section: Figure 13mentioning

confidence: 99%

Advanced high-κ dielectric stacks with polySi and metal gates: Recent progress and current challenges

2006

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The paper reviews our recent progress and current challenges in implementing advanced gate stacks composed of high-j dielectric materials and metal gates in mainstream Si CMOS technology. In particular, we address stacks of doped polySi gate electrodes on ultrathin layers of high-j dielectrics, dual-workfunction metal-gate technology, and fully silicided gates. Materials and device characterization, processing, and integration issues are discussed.

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PVD-High-K Gate Dielectrics With Fusi Gate and Influence of Pda Treatment on on-State Drive Current

Cited by 2 publications

References 4 publications

Hf-Based High-k Gate Dielectric Processing

Hf-Based High-k Gate Dielectric Processing

Advanced high-κ dielectric stacks with polySi and metal gates: Recent progress and current challenges

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