QoS aware BiNoC architecture

Lo, Shih-Hsin; Lan, Ying-Cherng; Yeh, Hsin-Hsien; Tsai, Wen–Chung; Hu, Yu-Hen; Chen, Sao-Jie

doi:10.1109/ipdps.2010.5470359

Cited by 14 publications

(9 citation statements)

References 17 publications

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“…Besides, some architectures, such as Virtual Channels (VCs) Reservation [4], are dedicated for the use of GS packets. Additionally, a QoS aware bi-directional architecture based on the prioritized VC scheme was proposed [5]. Recently, TDM (Time Division Multiplex) fashion design methodologies have been proposed respectively for unidirectional NoC [6] and bidirectional NoC [7] to address the network resource allocation problem.…”

Section: B Connection-less Methodsmentioning

confidence: 99%

“…However, primitive BiNoC architecture only provides good latency results for BE packets because of its better flexibility in the channel utilization, but it is incapable to support critical communication guarantees of GS packets that are much more important for real world applications. Consequently, a QoSaware BiNoC router with four virtual channels in each input port was proposed [5] to remedy QoS related problems.…”

Section: F Qos-aware Binocmentioning

confidence: 99%

“…Fig. 11 shows that using the old bandwidth allocation method p in [5], the BE packet-stream can achieve only about a 50% bandwidth grant even though a 70% bandwidth has been requested. The reason is that the GS packet-stream strongly occupy the use of VC buffers to best achieve its full bandwidth grant (for the 10% request).…”

Section: Bi-directional Router Designmentioning

confidence: 99%

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A novel flow fluidity meter for BiNoC bandwidth resource allocation

Tsai

Lin²,

Lan

et al. 2015

2015 28th IEEE International System-on-Chip Conference (SOCC)

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An enhanced on-chip network resource allocation method is developed for the Bi-directional Network-on-Chip (BiNoC) platform. Specifically, a novel flow Fluidity Meter (FM) is proposed to provide the real-time estimate of bandwidth utilization of the Virtual Channel (VC) buffer in a BiNoC router.The degree of fluidity of a packet transfer in each router is a reliable, yet low-cost method for measuring bandwidth utilization in the VC. We show that the overhead implementing this FM is very affordable. Finally, extensive simulation results verify that this proposed FM approach achieves superior performance compared to existing BiNoC resource allocation methods.

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Section: B Connection-less Methodsmentioning

confidence: 99%

Section: F Qos-aware Binocmentioning

confidence: 99%

Section: Bi-directional Router Designmentioning

confidence: 99%

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A novel flow fluidity meter for BiNoC bandwidth resource allocation

Tsai

Lin²,

Lan

et al. 2015

2015 28th IEEE International System-on-Chip Conference (SOCC)

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“…The drawback of such a design is that packets with low priorities may be dropped or stalled for a long time and has a longer latency resulting in an unachievable time-analyzability. The authors propose a low end-to-end latency with a guaranteed service traffic in [31]. In [32], [33], the researchers have addressed the low priority packet blocking problem in a connection-less NoC by introducing the concept of increasing priority over waiting time.…”

Section: Inter-core Communicationmentioning

confidence: 99%

PaRTAA: A Real-time Multiprocessor for Mixed-Criticality Airborne Systems

Majumder

Nielsen

Bak

2020

IEEE Trans. Comput.

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Mixed-criticality systems, where multiple systems with varying criticality-levels share a single hardware platform, require isolation between tasks with different criticality-levels. Isolation can be achieved with software-based solutions or can be enforced by a hardware level partitioning. An asymmetric multiprocessor architecture offers hardware-based isolation at the cost of underutilized hardware resources, and the inter-core communication mechanism is often a single point of failure in such architectures. In contrast, a partitioned uniprocessor offers efficient resource utilization at the cost of limited scalability. We propose a partitioned real-time asymmetric architecture (PaRTAA) specifically designed for mixed-criticality airborne systems, featuring robust partitioning within processing elements for establishing isolation between tasks with varying criticality. The granularity in the processing element offers efficient resource utilization where inter-dependent tasks share the same processing element for sequential execution while preserving isolation, and independent tasks simultaneously execute on different processing elements as per system requirements.

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“…In Ref. (17), the authors propose a low end-to-end latency with guaranteed service traffic. In Refs.…”

Section: Background and Related Workmentioning

confidence: 99%

A real-time on-chip network architecture for mixed criticality aerospace systems

Majumder¹,

Nielsen

Cour-Harbo³

et al. 2019

Aeronaut. j.

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Integrated Modular Avionics enables applications of different criticality levels to share the same hardware platform with an established temporal and spatial isolation. On-chip communication systems for such platforms must support different bandwidth and latency requirements of applications while preserving time predictability. In this paper, our concern is a time-predictable on-chip network architecture for targeting applications in mixed-criticality aerospace systems. The proposed architecture introduces a mixed, priority-based and time-division-multiplexed arbitration scheme to accommodate different bandwidth and latency in the same network while preserving worst-case time predictability for end-to-end communication without packet loss. Furthermore, as isolation of erroneous transmission by a faulty application is a key aspect of contingency management, the communication system should support isolation mechanisms to prevent interference. For this reason, a sampling port and isolated sampling buffer-based approach is proposed with a transmission authorisation control mechanism, guaranteeing spatial and temporal isolation between communicating systems.

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QoS aware BiNoC architecture

Cited by 14 publications

References 17 publications

A novel flow fluidity meter for BiNoC bandwidth resource allocation

A novel flow fluidity meter for BiNoC bandwidth resource allocation

PaRTAA: A Real-time Multiprocessor for Mixed-Criticality Airborne Systems

A real-time on-chip network architecture for mixed criticality aerospace systems

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