An algorithm for reversible logic synthesis is proposed. The task is, for given n-bit substitution map P n : {0, 1} n → {0, 1} n , to find a sequence of reversible logic gates that implements the map. The gate library adopted in this work consists of multiple-controlled Toffoli gates denoted by C m X, where m is the number of control bits that ranges from 0 to n − 1. Controlled gates with large m (> 2) are then further decomposed into C 0 X, C 1 X, and C 2 X gates. A primary concern in designing the algorithm is to reduce the use of C 2 X gate (also known as Toffoli gate) which is known to be universal [29].The main idea is to view an n-bit substitution map as a rank-2n tensor and to transform it such that the resulting map can be written as a tensor product of a rank-(2n − 2) tensor and the 2 × 2 identity matrix. Let P n be a set of all n-bit substitution maps. What we try to find is a size reduction map A red : P n → {P n : P n = P n−1 ⊗ I 2 }. One can see that the output P n−1 ⊗ I 2 acts nontrivially on n − 1 bits only, meaning that the map to be synthesized becomes P n−1 . The size reduction process is iteratively applied until it reaches tensor product of only 2 × 2 matrices.Time complexity of the algorithm is exponential in n as most previously known algorithms for reversible logic synthesis also are, but it terminates within reasonable time for not too large n which may find practical uses. As stated earlier, our primary concern is the number of Toffoli gates in the output circuit or quality for short, not the time complexity of the algorithm. Benchmark results show that the quality of circuits obtained in this work outperforms that of the previously reported ones for almost all hard benchmark functions suggested in [24,17]. A working code written in Python is publicly available from GitHub [1]. The algorithm is also applied to find reversible circuits for cryptographic substitution boxes which are being used in a certain type of encryption algorithms.