To improve electrical characteristics of high-k gate dielectrics, post-deposition annealing ͑PDA͒ was performed in high-pressure ͑10 atm͒ pure hydrogen ambient. High-pressure PDA samples show excellent electrical characteristics such as low fixed charge density, and reduced interface state density confirmed by capacitance-voltage analysis and conductance technique, respectively. They also showed no frequency dependency and a hysteresis of 2.9 mV. The leakage current decreases remarkably from 0.23 to 2.44 ϫ 10 −7 Ampere/cm 2 at the gate voltage of 1 V below V FB . The excellent electrical characteristics of high-pressure hydrogen annealed sample can be explained by enhanced hydrogen passivation of defects in high-k dielectric. According to the ITRS roadmap, beyond the 32 nm technology node high permittivity oxides mainly Hf-based oxides will replace the current Si-based oxides.1 Among other oxides, the lanthanum series oxides have attracted most attention.2,3 Ternary oxide materials like LaAlO 3 ͑LAO͒ also has emerged as a potential candidate for its better thermal stability. 4 It also has high band offset and dielectric constant.5 Recently, effective oxide thickness ͑EOT͒ of 3 Å for LAO has been reported which establishes LAO as the future gate dielectric material.
6The as grown high-k oxide contains lot of oxygen vacancy related defect sites which cause a negative shift of the C-V curve.7 In addition, the interface of these oxides with silicon has lattice mismatch which is known as interface trap charge. These charges cause different phenomena like hysteresis, leakage current, frequency dependency, and flatband instability, which prohibits its use as in the actual devices. A very common and simple technique to determine these oxide charges are from the capacitance-voltage ͑C-V͒ measurement. Both of these charges cause the flatband voltage of the C-V curve to shift either in the positive or negative direction from the ideal C-V curve according towhere V FB is the flatband voltage of the C-V curve, Q it is the interface trap charge, Q f is the interface fixed charge, W ms is the difference of work function between metal and silicon, and C ox is the accumulation capacitance. The platinum gate has an accepted work function of 5.65 eV. 9 The effective workfunction changes due to Fermi level pinning but normally platinum metal is considered to be more or less inert in nature. That is why platinum gate is widely used as a reference gate metal for metal gate research.10 The p-type silicon with doping concentration of ϳ1 ϫ 10 15 cm −2 has a work function of 4.895 eV, which gives a work function difference, W ms , of 0.755 eV. If there is no oxide charges present in the film then the ideal V FB will be equal to W ms .These high-k oxides also have higher leakage current in the asdeposited condition and to reduce the current density postdeposition annealing step is normally done in oxygen and nitrogen environment at different temperature ranging from 450 to 1000°C.
11These annealing steps not only reduce the leakage curren...