Quantum Low-Density Parity-Check Codes for Modular Architectures

Strikis, Armands; Berent, Lucas

doi:10.1103/prxquantum.4.020321

Cited by 9 publications

(3 citation statements)

References 32 publications

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“…Combined with the discussion on fault-tolerant realizations of non-Clifford gates [103], this paves the way towards fault-tolerant computation on the NAQC platform. This is of particular interest, as the requirements for proposed qLDPC code realizations on superconducting platforms, are still beyond current hardware capabilities [104][105][106].…”

Section: Fault-tolerant Qc and Error Correctionmentioning

confidence: 99%

Computational capabilities and compiler development for neutral atom quantum processors—connecting tool developers and hardware experts

Schmid,

Locher,

Rispler

et al. 2024

Quantum Sci. Technol.

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Neutral Atom Quantum Computing (NAQC) emerges as a promising hardware platform primarily due to its long coherence times and scalability. Additionally, NAQC offers computational advantages encompassing potential long-range connectivity, native multi-qubit gate support, and the ability to physically rearrange qubits with high fidelity. However, for the successful operation of a NAQC processor, one additionally requires new software tools to translate high-level algorithmic descriptions into a hardware executable representation, taking maximal advantage of the hardware capabilities. Realizing new software tools requires a close connection between tool developers and hardware experts to ensure that the corresponding software tools obey the corresponding physical constraints. This work aims to provide a basis to establish this connection by investigating the broad spectrum of capabilities intrinsic to the NAQC platform and its implications on the compilation process. To this end, we first review the physical background of NAQC and derive how it affects the overall compilation process by formulating suitable constraints and figures of merit. We then provide a summary of the compilation process and discuss currently available software tools in this overview. Finally, we present selected case studies and employ the discussed figures of merit to evaluate the different capabilities of NAQC and compare them between two hardware setups.

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Section: Fault-tolerant Qc and Error Correctionmentioning

confidence: 99%

Computational capabilities and compiler development for neutral atom quantum processors—connecting tool developers and hardware experts

Schmid,

Locher,

Rispler

et al. 2024

Quantum Sci. Technol.

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“…The logical error rate is given by where N ler (w) is the number of failure configurations of weight w and t = ⌊ d 2 ⌋ is the minimum number of correctable errors. Let us start by looking at small LCS codes with ℓ = 1, L ∈ {3, 4, 5} and parameters [ [15,3,3]], [ [20,4,3]] and [ [25,5,3]] respectively with a rate of r = 1/5. The first two codes are also shown in figure 14.…”

Section: Logical Error Rate and Pseudo-thresholdmentioning

confidence: 99%

“…In fact, no-go theorems prevent good scaling of parameters if the connectivity of the code is restricted to some neighborhood that does not grow with the code [20,21]. Several proposals on circuit constructions and implementation of QLDPC codes with constrained connectivity in mind have been formulated [22][23][24] and code constructions that explicitly leverage hardware capabilities like modularity are also considered [25]. Progress in platforms that allow for more connectivity opens the road to implement more advanced codes.…”

Section: Introductionmentioning

confidence: 99%

Lift-connected surface codes

Old,

Rispler,

Müller

2024

Quantum Sci. Technol.

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We use the recently introduced lifted product to construct a family of Quantum Low Density Parity Check Codes (QLDPC codes). The codes we obtain can be viewed as stacks of surface codes that are interconnected, leading to the name lift-connected surface (LCS) codes. LCS codes offer a wide range of parameters - a particularly striking feature is that they show interesting properties that are favorable compared to the standard surface code. For example, already at moderate numbers of physical qubits in the order of tens, LCS codes of equal size have lower logical error rate or similarly, require fewer qubits for a fixed target logical error rate. We present and analyze the construction and provide numerical simulation results for the logical error rate under code capacity and phenomenological noise. These results show that LCS codes attain thresholds that are comparable to corresponding (non-connected) copies of surface codes, while the logical error rate can be orders of magnitude lower, even for representatives with the same parameters. This provides a code family showing the potential of modern product constructions at already small qubit numbers. Their amenability to 3D-local connectivity renders them particularly relevant for near-term implementations.

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