2020
DOI: 10.1088/1748-0221/15/03/c03045
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R&D for the CLIC vertex and tracking detectors

Abstract: A : Significant progress has been made to develop silicon pixel technologies for use in the vertex and tracker regions of the proposed Compact Linear Collider (CLIC) detector design. The electron-positron collisions generated by this linear accelerator provide a clean, low-radiation environment for the inner detectors. However, physics-driven performance targets, the CLIC beam structure, and occupancies from beam-induced backgrounds place challenging requirements on detector technologies for this region. A pix… Show more

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Cited by 7 publications
(9 citation statements)
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“…A single-chip bump-bonding process for CLICpix2 ASICs has been studies. The interconnect yield of the fine-pitch bump bonding was tested extensively in laboratory measurements and a yield of up to 97.9% was found [4] .…”
Section: Hybrid Pixel Detectorsmentioning
confidence: 99%
“…A single-chip bump-bonding process for CLICpix2 ASICs has been studies. The interconnect yield of the fine-pitch bump bonding was tested extensively in laboratory measurements and a yield of up to 97.9% was found [4] .…”
Section: Hybrid Pixel Detectorsmentioning
confidence: 99%
“…It was initially developed within the CLIC Detector & Physics (CLICdp) collaboration [6,7] and is now employed and extended by a number of users and developers from different experiments supporting an increasing variety of sensor prototypes. A number of publications underline the versatility and the success of the framework [8][9][10][11][12][13][14][15]. Through its modularity, it aims to maximize synergies between different research groups by providing a reusable and extendable code basis and thus suppressing the need for numerous similar frameworks.…”
Section: Introductionmentioning
confidence: 99%
“…For the ultra-low mass vertex detector, different small pitch (25 µm) hybrid technologies with innovative sensor concepts are explored [7]. A dedicated readout chip called CLICpix2 [8] has been developed in 65 nm CMOS technology and bump-bonded to thin planar active-edge sensors [9]. To overcome the challenges of the fine-pitch bump-bonding, alternative interconnection techniques Table 1.…”
Section: Introductionmentioning
confidence: 99%