Radiation effects and underlying damage mechanisms in CMOS SPADs

Abstract

Effects of radiation on the dark count rate (DCR) of CMOS single photon avalanche diodes (SPADs) is reviewed. Both total ionizing and non ionizing dose effects are investigated using a test SPAD chip fabricated in a 180 nm CMOS technology as a case study. Models predicting the probability of damage, estimated through the measurement of DCR increase, are also presented. Emphasis is set on the damage dependence on radiation dose and device geometry. Particular attention is paid to the stochastic phenomena taking place in the sensitive volume of SPADs when they are exposed to relatively low fluences (micro-doses) of neutrons.