Radiation hardened Flip-Flop design for super and sub threshold voltage operation

Chavan, Ameet; MacDonald, Eric; Neff, Joseph; Bozeman, Eric

doi:10.1109/aero.2011.5747457

Cited by 8 publications

(3 citation statements)

References 11 publications

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“…Although no study has performed a hardware comparison of flip-flops in the subthreshold regime in terms of radiation, a simulation comparison using models from IBM12SOI 45nm CMOS technology was performed in [5] with an initial version of the proposed flip-flop. More generally, sequential elements have been examined in the traditional sense through simulations [6,7] over a wide cross section of commonly used flip-flops with a primary focus on performance and energy consumption.…”

Section: Previous Workmentioning

confidence: 99%

Heavy Ion Characterization of a Radiation Hardened Flip-Flop Optimized for Subthreshold Operation

Chavan

Palakurthi

MacDonald

et al. 2012

JLPEA

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Section: Previous Workmentioning

confidence: 99%

Heavy Ion Characterization of a Radiation Hardened Flip-Flop Optimized for Subthreshold Operation

Chavan

Palakurthi

MacDonald

et al. 2012

JLPEA

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“…OF THE PIPELINE REGISTERS To protect the vulnerable data as it is stored on the PRs, researchers have developed techniques at the device-level [25], circuit level (C-elements [7], [8]) and microarchitecture level (RAZOR II [9], [10]). The most effective and power-efficient techniques for pipeline hardening among them are C-elements and RAZOR II.…”

Section: Power-efficient Protectionmentioning

confidence: 99%

Systematic Methodology for the Quantitative Analysis of Pipeline-Register Reliability

Jeyapaul

Flores²,

Ávila

et al. 2017

IEEE Trans. VLSI Syst.

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Decades of rapid aggressive technology scaling have brought the challenge of soft errors to modern computing systems. Sequential elements (registers) in the processor pipeline exposed to charge-carrying particles generate bit flips or soft errors that could translate into system failures. Next to the processor cache, the pipeline registers (PRs)-registers between two pipeline stages-account for more than 50% of soft-error failures in the system. In this paper, for the first time, we apply architectural correct execution models that quantitatively define the vulnerability (or exposure to soft errors) of microarchitectural components, and extend it to define the vulnerability of PRs-PR vulnerability (PRV). We develop gemV-Pipe, a simulation toolset for the systematic, accurate, and quantitative estimation and analysis of PRV. Our detailed ISA-aware analysis in gemV-Pipe reveals interesting facts on the data-access behavior of PRs: 1) the vulnerability of each PR is not proportional to their size; 2) the PR bits used for one instruction may not be used (and are thus not vulnerable) for another, which makes PRV extremely instruction-dependent; and 3) the functionality of stored data on the PR bits can be used to classify them as-instruction, control, and data bits-each of which differ in their instructionspecific behavior and vulnerability. Applying the insight gained, we perform design space exploration on selectively hardening the PR bits, and demonstrate that 75% improved reliability can be achieved for only <15% power overhead.

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“…A rising time constant of 10ps (τ α ) for charge collection and a falling time constant of 500ps (τ β ) for the ion track establishment, was chosen. The time constant values are dependent on the process technology of devices [13]. The equation below is a double exponential current source given by …”

Section: Effects Of Radiations On Mosfets and Cntfetsmentioning

confidence: 99%

Set and Seu Analysis of Cntfet Based Designs in Harsh Environments

Chavan¹,

Reddy²

2014

IJRET

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Radiation hardened Flip-Flop design for super and sub threshold voltage operation

Cited by 8 publications

References 11 publications

Heavy Ion Characterization of a Radiation Hardened Flip-Flop Optimized for Subthreshold Operation

Heavy Ion Characterization of a Radiation Hardened Flip-Flop Optimized for Subthreshold Operation

Systematic Methodology for the Quantitative Analysis of Pipeline-Register Reliability

Set and Seu Analysis of Cntfet Based Designs in Harsh Environments

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