Radiation-Hardened Low Read Delay 12T-SRAM Cell for Space Applications

Kotni, Jyothi Prakash; Pandey, Monalisa; Prasad, Saurabh; Islam, Aminul

doi:10.1109/devic50843.2021.9455796

Cited by 5 publications

(2 citation statements)

References 26 publications

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“…27 There are several kinds of SNM in use, including the holding SNM (HSNM), reading SNM (RSNM), and writing SNM (WSNM). 28 Figure 6 shows a dot plot of the noise tolerance of each cell as the power supply voltage changes. With the increase of supply voltage, the HSNM, RSNM, and WSNM all increase gradually.…”

Section: Stability Comparisonmentioning

confidence: 99%

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Write‐enhanced and radiation‐hardened SRAM for multi‐node upset tolerance in space‐radiation environments

Zhao

Dong

Peng

et al. 2022

Circuit Theory & Apps

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Summary As transistor feature size is scaling down, the probability of charge sharing in a space‐radiation environment increases because of the reduced distance between adjacent transistors. The single‐event multiple‐node upset (SEMNU) caused by charge sharing is a major source of data errors in high‐density static random‐access memory (SRAM). In this paper, a radiation‐hardened SRAM using polarity hardening is proposed. Compared to other cells (RHPD‐12T, RSP14T, SEA14T, We‐Quatro, QUCCE12T, SARP12T, SIS10T, and 12T), the proposed RHC‐14T cell saves 8.47%, 91.34%, 162.71%, ‐20.63%, −20.50%, 113.18%, 63.27%, and 20.60% of the read‐delay time and 7.96%, 66.17%, 68.16%, 57.71%, 22.39%, 12.44%, 1,010.45%, and 13.43% of the write‐delay time, respectively. Moreover, this excellent performance entails only minimal power consumption. The proposed cell can work well in the radiation‐intensive space environment.

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Section: Stability Comparisonmentioning

confidence: 99%

“…It is usually measured by the length of the largest square side in the butterfly curve 27 . There are several kinds of SNM in use, including the holding SNM (HSNM), reading SNM (RSNM), and writing SNM (WSNM) 28 …”

Section: Cell‐performance Comparisonmentioning

confidence: 99%

Write‐enhanced and radiation‐hardened SRAM for multi‐node upset tolerance in space‐radiation environments

Zhao

Dong

Peng

et al. 2022

Circuit Theory & Apps

View full text Add to dashboard Cite

show abstract

Circuit-level design of radiation tolerant memory cell

Pandey,

Islam

2024

AEU - International Journal of Electronics and Communications

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9T fast‐write SRAM bit cell with no conflicts for ultra‐low voltage

Jiang,

Wen,

Meng

et al. 2024

Electronics Letters

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With the development of processes and reduction of transistor size, transistor sensitivity to voltage changes has increased. Traditional SRAM bit cells struggle to function properly at low voltages, and the lengthy write time necessitated by the write conflict problem will inevitably result in write failure. As ultra‐low‐voltage SRAM has emerged as a significant direction of research for SRAM, this paper proposes an ultra‐low‐voltage 9T SRAM bit cell that is conflict‐free. By circumventing write conflicts and enabling rapid writing, the bit cell demonstrates its superiority, particularly at ultra‐low voltages, by eliminating the requirement for peripheral write‐assist circuitry to accomplish chip writing. To assess the performance of the conflict‐free 9T bit cell, simulation experiments are conducted utilizing the 28 nm process model. Simulation results indicate that the 9T bit cell proposed in this paper requires only 66% of the writing time of the traditional 6T cell. This enables the cell to accomplish fast writing and more stable writing performance.

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Radiation-Hardened Low Read Delay 12T-SRAM Cell for Space Applications

Cited by 5 publications

References 26 publications

Write‐enhanced and radiation‐hardened SRAM for multi‐node upset tolerance in space‐radiation environments

Write‐enhanced and radiation‐hardened SRAM for multi‐node upset tolerance in space‐radiation environments

Circuit-level design of radiation tolerant memory cell

9T fast‐write SRAM bit cell with no conflicts for ultra‐low voltage

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