occurred, and the surface currents on the microstrip line is stopped by the tuning stub which leads to a notched band at 5-6 GHz. As f ϭ 9 GHz, the surface current on the microstrip feeder can avoid the tuning stub, as shown in Figure 6(c). Moreover, the proposed band-notch microstrip design has no effect on the current distribution of the rectangular monopole.
RESULTSThe simulated and measured VSWR curves of proposed antenna are shown in Figure 7. It is noted that the simulated impedance bandwidth for VSWR Յ 2 is from 2.7 to 11.5 GHz with a notched band ranging from 5.1 to 5.9 GHz, whereas the measured impedance bandwidth is from 2.9 to 11.6 GHz with a notched band of 5.0 -5.9 GHz, which covers the desired 3.1-10.6 GHz and avoids WLAN/HIPERLAN/2 interference. The measured radiation patterns at the operating frequencies of 3.2, 7.5, and 10.5 GHz are shown in Figure 8. The H-plane radiation patterns of the proposed antenna are omni-directional. These results meet the characteristic of UWB systems, which may receive information signals from all directions. Figure 9 shows the measured gains of the proposed antenna. A sharp decrease of maximum antenna gain in the notched frequency band at 5.5 GHz is observed.
CONCLUSIONSA novel band-notch rectangular monopole antenna has been investigated in this article, which presents a band-notch performance in the WLAN band by embedding a tuning stub in the microstrip feeder. The effect of the tuning stub and the current distribution on the monopole is also investigated. The measured impedance bandwidth is sufficient to cover the requirement of UWB band and a notched band to avoid the WLAN/HIPERLAN/2 systems interference. The proposed antenna provides a good omni-directional radiation with a compact size. With these features, this antenna is attractive for the UWB communication applications.
ABSTRACT: The method of finite coupled elementary lines (FCEL) is used in the analysis of a microstrip disk antenna with a larger parasitic director. A closed form expression of the effective radius forthe used structure is proposed. The obtained numerical results are compared with published measurements and good agreement is noticed. ABSTRACT: This article presents a CMOS quadrature voltage-controlled oscillator (QVCO). The LC-tank QVCO consists of two crosscoupled nMOS divide-by-2 injection-locked frequency divider (ILFDs) with a tail transistor, which serves the role of frequency doubler. The output of the tail transistor in one ILFD is injected to the bodies of the nMOSFETs in the other ILFD. The proposed CMOS QVCO has been implemented with the TSMC 0.18 m CMOS technology and the die area is 0.595 ϫ 0.896 mm 2 . At the supply voltage of 0.6 V, the total power consumption is 2.4 mW. The free-running frequency of QVCO is tunable from 5.44 to 5.8 GHz as the tuning voltage is varied from 0.0 to 0.6 V. The measured phase noise at 1 MHz frequency offset is Ϫ115.62 dBc/Hz at the oscillation frequency of 5.44 GHz and the figure of merit (FOM) of the proposed QVCO is Ϫ186.6 dBc/Hz.