Rationalisation of the Fibonacci Charge Pump

Abstract

This paper focuses on the practical aspects of the realisation the Fibonacci charge pump (FCP). The main attention is dedicated to the study of the influence of clock frequency and the capacitance of the used capacitor to key parameters of proposed FCP. This studying is performed by measurement of four specimens of FCP with different values of capacitance and clocking frequency. The rationalisation increases the efficiency to 85 % approximately (for VIN = 3 V, VOUT = 34.3 V, IOUT = 1 mA). The results of this work allow rational selection of capacitance in relation to requested parameters of the designed charge pump.

3-V Input, 70-V Output, Fully Integrated Hybrid Charge Pump

“…V O,ideal matches with results of (7) reported in [5] for Dickson CP without top stray capacitor, with results of (11) in [12] for Serial-Parallel CP replacing diodes with switches, and with results of (2) in [24] for Fibonacci CP replacing diodes with switches.…”

Streamlined Fibonacci Charge Pump

“…The study of clock frequency influence to parameters of presented FCP was performed in the previous period The published research results were supported by the Internal Grant Agency of University of Pardubice. [7]. The results of this study fully verified this premise.…”

“…1) leads to the generation of a shoot-through current. Thus, the capacitor connected to the appropriate node is discharged by this shootthrough current [7]. • These auxiliary inverters generate the propagation delay that is gradually increased from the input to the output of the charge pump.…”

“…The timing discrepancy between the stages may cause a loss of a charge. This effect is important only for a high clocking frequency [7]. • The voltage drop and a finite resistance of used diodes (see Fig.…”