Re-enactment simulation for buffer size optimization in semiconductor back-end production

Abstract

In this work, we propose a re-enactment simulation-based optimization method to determine the minimal total buffer capacity in an assembly line required to meet a target throughput. A distinguishing feature is the use of real-time event traces, in a fast fluid flow simulation model. Employing real-time event traces avoids the necessity to make restrictive modeling assumptions. The fluid simulation is combined with a multi start search algorithm. To demonstrate its effectiveness, the method is applied to a real-world use case in lead frame based semiconductor back-end manufacturing. This use case considers an assembly line consisting of six machines, for which the proposed method determines optimal buffer size configurations within several minutes of computational time.