READY: Reliability- and Deadline-Aware Power-Budgeting for Heterogeneous Multicore Systems

Saber-Latibari, Javad; Ansari, Mohsen; Gohari-Nazari, Pourya; Yari-Karin, Sina; Monazzah, Amir Mahdi Hosseini; Ejlali, Alireza

doi:10.1109/tcad.2020.3003288

Cited by 13 publications

(4 citation statements)

References 35 publications

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“…Saber-Latibari et al [84] have proposed a mapping and scheduling method by employing task replication mechanism for a task-graph model of applications in heterogeneous multi-core systems. The hardware configuration of this work is a processor with two heterogeneous islands which execute a different number of tasks.…”

Section: B Replicationmentioning

confidence: 99%

A Survey of Fault-Tolerance Techniques for Embedded Systems From the Perspective of Power, Energy, and Thermal Issues

et al. 2022

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The relentless technology scaling has provided a significant increase in processor performance, but on the other hand, it has led to adverse impacts on system reliability. In particular, technology scaling increases the processor susceptibility to radiation-induced transient faults. Moreover, technology scaling with the discontinuation of Dennard scaling increases the power densities, thereby temperatures, on the chip. High temperature, in turn, accelerates transistor aging mechanisms, which may ultimately lead to permanent faults on the chip. To assure a reliable system operation, despite these potential reliability concerns, fault-tolerance techniques have emerged. Specifically, fault-tolerance techniques employ some kind of redundancies to satisfy specific reliability requirements. However, the integration of fault-tolerance techniques into real-time embedded systems complicates preserving timing constraints. As a remedy, many task mapping/scheduling policies have been proposed to consider the integration of fault-tolerance techniques and enforce both timing and reliability guarantees for real-time embedded systems. More advanced techniques aim additionally at minimizing power and energy while at the same time satisfying timing and reliability constraints. Recently, some scheduling techniques have started to tackle a new challenge, which is the temperature increase induced by employing fault-tolerance techniques. These emerging techniques aim at satisfying temperature constraints besides timing and reliability constraints. This paper provides an in-depth survey of the emerging research efforts that exploit fault-tolerance techniques while considering timing, power/energy, and temperature from the real-time embedded systems' design perspective. In particular, the task mapping/scheduling policies for fault-tolerance real-time embedded systems are reviewed and classified according to their considered goals and constraints. Moreover, the employed fault-tolerance techniques, application models, and hardware models are considered as additional dimensions of the presented classification. Lastly, this survey gives deep insights into the main achievements and shortcomings of the existing approaches and highlights the most promising ones.INDEX TERMS Fault-tolerance, embedded systems, real-time computing, scheduling, power/energy minimization, thermal-aware design.

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Section: B Replicationmentioning

confidence: 99%

A Survey of Fault-Tolerance Techniques for Embedded Systems From the Perspective of Power, Energy, and Thermal Issues

et al. 2022

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“…1) Core's Reliability Management: Temperature is the main factor that greatly impacts the system's reliability. In this sense, a prevalent reliability management strategy is to throttle the core's frequency and then applying dynamic thermal management techniques [23], [24], [25], [26] to multi-core processors. Finally, the target is to keep the operating temperature below a certain threshold (e.g., 70 °C).…”

Section: B Multicore Server Reliability Managementmentioning

confidence: 99%

Reinforcement Learning-Based Joint Reliability and Performance Optimization for Hybrid-Cache Computing Servers

Huang

Pahlevan

Costero

et al. 2022

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Computing servers play a key role in the development and process of emerging compute-intensive applications in recent years. However, they need to operate efficiently from an energy perspective viewpoint, while maximizing the performance and lifetime of the hottest server components (i.e., cores and cache). Previous methods focused on either improving energy efficiency by adopting new hybrid-cache architectures including the resistive random-access memory (RRAM) and static randomaccess memory (SRAM) at the hardware level, or exploring trade-offs between lifetime limitation and performance of multicore processors under stable workloads conditions. Therefore, no work has so far proposed a co-optimization method with hybridcache-based server architectures for real-life dynamic scenarios taking into account scalability, performance, lifetime reliability, and energy efficiency at the same time. In this paper, we first formulate a reliability model for the hybrid-cache architecture to enable precise lifetime reliability management and energy efficiency optimization. We also include the performance and energy overheads of cache switching, and optimize the benefits of hybrid-cache usage for better energy efficiency and performance. Then, we propose a runtime Q-Learning-based reliability management and performance optimization approach for multi-core microprocessors with the hybrid-cache architecture, jointly incorporated with a dynamic preemptive priority queue management method to improve the overall tasks' performance by targeting to respect their end time limits. Experimental results show that our proposed method achieves up to 44% average performance (i.e., tasks execution time) improvement, while maintaining the whole system design lifetime longer than 5 years, when compared to the latest state-of-the-art energy efficiency optimization and reliability management methods for computing servers.

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“…A large body of work exists on thermal-aware multi/many-core application mapping, e.g. [18]- [24]. However, as this paper focuses on the task-migration aspect of resource management, our review of related work in the following is focused on the state of the art in thermal-aware task migration in multi/manycore systems.…”

Section: Related Workmentioning

confidence: 99%

Task Migration Policy for Thermal-Aware Dynamic Performance Optimization in Many-Core Systems

et al. 2022

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The steady downsizing of semiconductor technology nodes in recent years has led to a rapid increase in the density of power consumption on chips which, in turn, renders temperature a major issue for many-core systems, adversely affecting their performance, reliability, leakage, cost, etc. In this context, task migration is a powerful technique that is widely used for controlling the temperature profile of many-core systems under dynamic workloads with the goal to improve their performance, utilization, reliability, etc. In this paper, we present a task migration policy for thermal-aware performance optimization in heterogeneous many-core systems. The proposed policy is developed based on an analytical and thermally safe power-budgeting scheme and uses Dynamic Voltage and Frequency Scaling (DVFS) for power and thermal management of the system. Our migration policy aims at maximizing the system's performance and, at the same time, proactively enforcing thermal safety using DVFS. To that end, it iteratively adapts the distribution of active cores in the system (through proper migration decisions) to maximize the thermally safe power budget of active cores and, thereby, enable them to operate on higher frequencies without violating their safe thermal threshold. Experimental results demonstrate that the proposed policy offers 2× higher performance gain in comparison to existing approaches which aim at greedily reducing the average, variance, or gradient of temperature as an indirect means to enhance performance.

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READY: Reliability- and Deadline-Aware Power-Budgeting for Heterogeneous Multicore Systems

Cited by 13 publications

References 35 publications

A Survey of Fault-Tolerance Techniques for Embedded Systems From the Perspective of Power, Energy, and Thermal Issues

A Survey of Fault-Tolerance Techniques for Embedded Systems From the Perspective of Power, Energy, and Thermal Issues

Reinforcement Learning-Based Joint Reliability and Performance Optimization for Hybrid-Cache Computing Servers

Task Migration Policy for Thermal-Aware Dynamic Performance Optimization in Many-Core Systems

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