2018
DOI: 10.1109/lra.2018.2800786
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Real-Time Dense Stereo Matching With ELAS on FPGA-Accelerated Embedded Devices

Abstract: For many applications in low-power real-time robotics, stereo cameras are the sensors of choice for depth perception as they are typically cheaper and more versatile than their active counterparts. Their biggest drawback, however, is that they do not directly sense depth maps; instead, these must be estimated through data-intensive processes. Therefore, appropriate algorithm selection plays an important role in achieving the desired performance characteristics.Motivated by applications in space and mobile robo… Show more

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Cited by 35 publications
(22 citation statements)
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“…2) Redundancy Checking and Disparity Prior Generation: To produce the anchor image (see Figure 5), we further sparsify the support point image from §I-B1 by processing it in raster order and invalidating any pixel whose disparity has already been seen within a window behind and above it. Unlike [28], which for each pixel (x, y) used a window of where K was set to 5, which only encompassed points in the same row or same column as the pixel being processed, here we use a larger window of…”
Section: B Generation Of Priorsmentioning
confidence: 99%
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“…2) Redundancy Checking and Disparity Prior Generation: To produce the anchor image (see Figure 5), we further sparsify the support point image from §I-B1 by processing it in raster order and invalidating any pixel whose disparity has already been seen within a window behind and above it. Unlike [28], which for each pixel (x, y) used a window of where K was set to 5, which only encompassed points in the same row or same column as the pixel being processed, here we use a larger window of…”
Section: B Generation Of Priorsmentioning
confidence: 99%
“…the Xilinx ZCU104, which combines both an ARM processor and an FPGA, with shared direct memory access, into a single chip. Recently, several works have explored the deployment of stereo methods on such platforms: both [26] and [19] use the CPU mainly for handling communication and controlling peripherals, while [28] actively leverages the CPU to execute iterative steps that would be infeasible on an FPGA (e.g. Delaunay triangulation).…”
mentioning
confidence: 99%
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“…However, an oversized window not only consumes computational resources but also makes too many errors in matching. Therefore, the size of the window in CT is one of the important keys to determining the performance [ 19 ].…”
Section: Introductionmentioning
confidence: 99%
“…It has thus proved highly popular in real-world systems, and many FPGA-based approaches have been inspired by it [2], [10], [20], [28], [41], [42]. Other FPGA-based methods have also been presented [34], [36], [37], [46], [50], but, whilst typically faster than those inspired by SGM, they seldom reach the same level of accuracy. However, because the disparities that SGM computes for neighbouring pixels are based on star-shaped sets of input pixels that are mostly disjoint, SGM suffers from streaking in areas in which the data terms in some directions are weak, whilst those in other directions are strong.…”
Section: Introductionmentioning
confidence: 99%