Real-Time FPGA Implementation of FIR Filter Using OpenCL Design

Firmansyah, Iman; Yamaguchi, Yoshiki

doi:10.1007/s11265-021-01723-6

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2024

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Cited by 6 publications

References 30 publications

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Designing a Graphics Accelerator with Heterogeneous Architecture

Tarasov,

Mirzoyan,

Sovietov

2024

Communications in Computer and Information Science

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Designing a Graphics Accelerator with Heterogeneous Architecture

Tarasov,

Mirzoyan,

Sovietov

2024

Communications in Computer and Information Science

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EOG Signal Processor: An SVM-based Multiclass Classifier to Detect Eye Movements

Das,

Chowdhury,

Chowdhury

et al. 2024

J Sign Process Syst

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Signal processing implementation of low-cost target speed detection of CW radar using FPGA

Salem,

Hosseny

2024

Int. j. inf. tecnol.

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The low-cost Continuous Wave (CW) radar architecture for object speed detection is presented in this research. An FPGA (Field-Programmable Gate Array) processor is utilized to implement the CW radar dependably and optimally. The suggested approach uses a bank of filters made expressly to extract velocity information from radar signals to compute the target velocity. Depending on the needs of the particular application, the acquired data has either undergone additional processing or been presented in an approachable manner. The implemented design is checked in real-time with a chip scope, functionally simulated, and then inspected with lab instruments to compare all simulated and implemented outcomes. Numerous applications, such as industrial automation, surveillance, and automotive systems, where accurate velocity detection is crucial and low-cost design is required, could benefit from this concept.

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Real-Time FPGA Implementation of FIR Filter Using OpenCL Design

Cited by 6 publications

References 30 publications

Designing a Graphics Accelerator with Heterogeneous Architecture

Designing a Graphics Accelerator with Heterogeneous Architecture

EOG Signal Processor: An SVM-based Multiclass Classifier to Detect Eye Movements

Signal processing implementation of low-cost target speed detection of CW radar using FPGA

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