Real time H.263 video codec using parallel DSP

Wang, Lin; Goh, Kwong Huang; Tye, B.J.; Powell, G.; Ohya, Tomoyuki; Adachi, Sadao

doi:10.1109/icip.1997.638839

Cited by 13 publications

(5 citation statements)

References 0 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…Task-level parallelism assigns independent tasks to different processors and data-level parallelism process independent data concurrently. Task-level parallelism is more suitable for asymmetric multi-core architecture since the loading of each task is usually not balanced [13,14]. Task-level parallelism are also preferred in hardware implementations [15][16][17][18][19], software-hardware co-design [20], and software pipelining [25].…”

Section: Related Workmentioning

confidence: 99%

A Multi-core Architecture Based Parallel Framework for H.264/AVC Deblocking Filters

Wang

Yang

Chen

et al. 2008

J Sign Process Syst Sign Image Video Technol

View full text Add to dashboard Cite

Deblocking filter is one of the most time consuming modules in the H.264/AVC decoder as indicated in many studies. Therefore, accelerating deblocking filter is critical for improving the overall decoding performance. This paper proposes a novel parallel algorithm for H.264/AVC deblocking filter to speed the H.264/AVC decoder up. We exploit pixellevel data parallelism among filtering steps, and observe that results of each filtering step only affect a limited region of pixels. We call this "the limited propagation effect". Based on this observation, the proposed algorithm could partition a frame into multiple independent rectangles with arbitrary granularity. The proposed parallel deblocking filter algorithm requires very little synchronization overhead, and provides good scalability. Experimental results show that applying the proposed parallelization method to a SIMD optimized sequential deblocking filter achieves up to 95.31% and Ja-Ling Wu is a Fellow IEEE. 224.07% speedup on a two-core and four-core processor, respectively. We have also observed a significant speedup for H.264/AVC decoding, 21% and 34% on a two-core and four-core processor, respectively.

show abstract

Section: Related Workmentioning

confidence: 99%

A Multi-core Architecture Based Parallel Framework for H.264/AVC Deblocking Filters

Wang

Yang

Chen

et al. 2008

J Sign Process Syst Sign Image Video Technol

View full text Add to dashboard Cite

show abstract

“…Lin et al [39] and Cantineau et al [40] have reported functional parallelization of the H.263 and MPEG-2 encoders respectively. They have used a multiprocessor with one control processor and four DSPs.…”

Section: Related Workmentioning

confidence: 99%

Parallel Scalability of Video Decoders

Meenderinck

Azevedo

Juurlink

et al. 2008

J Sign Process Syst Sign Image Video Technol

View full text Add to dashboard Cite

An important question is whether emerging and future applications exhibit sufficient parallelism, in particular thread-level parallelism, to exploit the large numbers of cores future chip multiprocessors (CMPs) are expected to contain. As a case study we investigate the parallelism available in video decoders, an important application domain now and in the future. Specifically, we analyze the parallel scalability of the H.264 decoding process. First we discuss the data structures and dependencies of H.264 and show what types of parallelism it allows to be exploited. We also show that previously proposed parallelization strategies such as slice-level, frame-level, and intra-frame macroblock (MB) level parallelism, are not sufficiently scalable. Based on the observation that inter-frame dependencies have a limited spatial range we propose a new parallelization strategy, called Dynamic 3D-Wave. It allows certain MBs of consecutive frames to be decoded in parallel. Using this new strategy we analyze the limits to the available MB-level parallelism in H.264. Using real movie sequences we find a maximum MB parallelism ranging from 4000 to 7000. We also perform a case study to assess the practical value and possibilities of a highly parallelized H.264 application. The results show that H.264 exhibits sufficient parallelism to efficiently exploit the capabilities of future manycore CMPs.

show abstract

“…The main problem of shared memory systems is that a bottleneck occurs when a number of processors attempt to access the global memory store at the same Leung et al (2000). A parallel implementation of H.263 video CODEC on a TMS320C80 MVP was reported in Lin et al (1997). A parallel implementation of H.263 video CODEC on a TMS320C80 MVP was reported in Lin et al (1997).…”

Section: Real-time Video Compression For Broadcast and Mobile Servicesmentioning

confidence: 99%

A Parallel Processing Framework for Real-Time Software-Only Video Compression for Broadcast and Mobile Services

Zheng¹,

Cosmas²

2006

Journal of Intelligent Systems

View full text Add to dashboard Cite

This paper develops a generic parallel processing framework on embedded multicomputer systems for real-time video compression for convergent broadcast and cellular services. This framework allows easy prototyping of new parallel video compression algorithms and integration with video applications. Using the proposed parallel processing framework, a parallel H.263 encoder has been implemented on a PowerPC processor-based Mercury RACE multicomputer. The experimental results show promising parallel speedups. Real-time performance was achieved for QCIF video using the non-optimized reference software. The parallel processing framework not only can be configured with different number of processors on an embedded multicomputer system but also is portable onto varied embedded multicomputer platforms. Therefore, this paper provides a software implementation solution as an alternative to hardware video compression for broadcast and mobile services. KEYWORDSbroadcast and mobile service, parallel processing framework, real-time video compression Reprint requests to: Lizhi Zheng, School of Engineering and Design, Brunei University,

show abstract

Real time H.263 video codec using parallel DSP

Cited by 13 publications

References 0 publications

A Multi-core Architecture Based Parallel Framework for H.264/AVC Deblocking Filters

A Multi-core Architecture Based Parallel Framework for H.264/AVC Deblocking Filters

Parallel Scalability of Video Decoders

A Parallel Processing Framework for Real-Time Software-Only Video Compression for Broadcast and Mobile Services

Contact Info

Product

Resources

About