2022
DOI: 10.1016/j.micpro.2022.104468
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Real-time task scheduling for FPGA-based multicore systems with communication delay

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Cited by 8 publications
(4 citation statements)
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“…Refs. [9,10] propose task-level schedulers to accelerate the modules running in parallel on FPGA. HRES is a task partitioning method based on DPR (dynamic partial reconfiguration) [11].…”
Section: Heterogeneous Computing Workload Partioningmentioning
confidence: 99%
See 1 more Smart Citation
“…Refs. [9,10] propose task-level schedulers to accelerate the modules running in parallel on FPGA. HRES is a task partitioning method based on DPR (dynamic partial reconfiguration) [11].…”
Section: Heterogeneous Computing Workload Partioningmentioning
confidence: 99%
“…On the other side, task partitioning does not need to deploy FPGA resources to all sub-tasks, because part of sub-tasks entirely runs on the GPU or CPU. [9,10] propose tasklevel schedulers to accelerate the modules running in parallel on FPGA. HRES is a task partitioning method based on DPR (dynamic partial reconfiguration) [11].…”
Section: Heterogeneous Computing Workload Partioningmentioning
confidence: 99%
“…The scheduling objective is to map tasks onto different Processing Elements (PEs) to satisfy the deadline constraint and the data dependencies while striving to achieve a minimum completion time, known as makespan. Such a problem has been proven to NP-hard [2].…”
Section: Introductionmentioning
confidence: 99%
“…Recently, Zhu et al [13] proposed a real-time task scheduling framework on CPU+FPGA systems, but their work only considered independent tasks. Dependent real-time task scheduling in an FPGA-based multicore setting to minimize the makespan under hardware resource constraints has been investigated in [2]. However, this technique is only evaluated via software simulations using hypothetical FPGA parameters without considering any practical constraints.…”
Section: Introductionmentioning
confidence: 99%