Real-Time Vector Automata

Abstract

We study the computational power of real-time finite automata that have been augmented with a vector of dimension k, and programmed to multiply this vector at each step by an appropriately selected $k \times k$ matrix. Only one entry of the vector can be tested for equality to 1 at any time. Classes of languages recognized by deterministic, nondeterministic, and "blind" versions of these machines are studied and compared with each other, and the associated classes for multicounter automata, automata with multiplication, and generalized finite automata.Comment: 14 page

Homing vector automata

“…On the other hand, it is known that the nonregular unary language UGAUSS = {a n 2 +n |n ∈ N} can be recognized by a rtD2CA [18]. By Theorem 5.2, we know that rtDHVA(k)'s and inherently rtDBHVA(k)'s can recognize only regular languages in the unary case.…”

“…Note that when the machine in consideration is deterministic and blind, the real-time and one-way versions are equivalent in power. One can use the argument in Theorem 8 of [18] to prove this fact.…”

“…Generalizing the idea of finite automata equipped with a register, we have previously introduced vector automata in [18]. A vector automaton is a finite automaton which is endowed with a vector, and which can multiply this vector with an appropriate matrix at each step.…”

New Results on Vector and Homing Vector Automata

“…Moreover, the first entry of the new vector is set to the summation mentioned above. In this way, the computation of V is simulated by V and both b In [23], the size of an n-DBVA(k) is defined as nk, and a hierarchy theorem is given based on the size of DBVAs.…”

“…With the motivation of the matrix multiplication view of programming, we have previously introduced vector automata (VA) [23], which are finite automata equipped with a vector that is multiplied with an appropriate matrix at each step.…”