In EUV lithography, good resist patterning requires an assist layer beneath it to provide adhesion to prevent pattern collapse of small features and allow for higher aspect ratios. In addition, future EUV high numerical aperture (NA) is expected to require a decrease in thickness from the overall patterning stack. In this study, we are exploring a fundamentally new approach to developing an alternative and cost-effective underlayer to functionalize surfaces and enable EUV patterning. Rather than forming a 5-nm polymer film between the resist and its substrate, we propose to modify the substrate by spin-coating a thinner layer. In contrast to conventional underlayers (5–10 nm), the substrate is modified by a sub-1-nm layer during baking. Comprehensive analysis of the surface modification and coating was conducted by GPC, ellipsometer, and contact angle to identify the structure, stability, coating quality, and surface energy. Lithographic performance of existing EUV resist with the assist of this thin layer on Si wafers and different silicon hardmasks was evaluated using NXE3400 EUV exposure system to print HP14nm line-space features. It has been demonstrated that this sub-1-nm layer is able to realize HP14nm with a wider process window, higher depth of focus, and lower LWR on a Si wafer. Moreover, a silicon hardmask that could not realize printable features had significantly improved lithographic performance with the assist of this layer. Comparisons were also made with the industry-standard HMDS priming. Systematic analysis indicates that a sub-1-nm layer exemplifies a novel and effective way to enhance photoresist-substrate compatibility and improve EUV lithographic performance.