2020
DOI: 10.1109/jeds.2020.3025266
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Realizing XOR and XNOR Functions Using Tunnel Field-Effect Transistors

Abstract: Recently, a few compact logic function realizations such as AND, OR, NAND and NOR have been proposed using double-gate tunnel field-effect transistor (DGTFET) with independent gate-control. In this paper, using two-dimensional device simulations, we propose to realize the exclusive-OR (XOR) and exclusive-NOR (XNOR) logic functions. To implement an XOR function, a dual-material DGTFET (DM-DGTFET) is used. The structure is designed such that the band-to-band tunneling (BTBT) occurs at the boundary of these dual-… Show more

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Cited by 7 publications
(5 citation statements)
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“…11,12,[22][23][24][25] The same simulation setup has been used in previous works. [26][27][28] The narrow intrinsic region between the two pockets is prone to quantum confinement and a bandgap widening model is implemented to include the effect of quantum confinement in the region. The model assumes a rectangular infinite potential well and assumes zero density of states until the first sub-band in the conduction band and valence band is encountered, thus giving the effect of bandgap widening.…”
Section: Device Structure and Simulation Modelmentioning
confidence: 99%
“…11,12,[22][23][24][25] The same simulation setup has been used in previous works. [26][27][28] The narrow intrinsic region between the two pockets is prone to quantum confinement and a bandgap widening model is implemented to include the effect of quantum confinement in the region. The model assumes a rectangular infinite potential well and assumes zero density of states until the first sub-band in the conduction band and valence band is encountered, thus giving the effect of bandgap widening.…”
Section: Device Structure and Simulation Modelmentioning
confidence: 99%
“…Because its manufacturing process is compatible with standard CMOS process platforms, it is considered one of the best candidates for next-generation logic devices [ 3 , 4 ]. Although silicon-based TFETs are confronted with problems such as weak driving capability and the parasitic bipolar effects, it is also actively studied and used to implement the logic gate with interesting characteristics [ 5 , 6 , 7 , 8 , 9 , 10 , 11 , 12 , 13 , 14 ]. Referring to [ 5 , 6 ], a set of hybrid TFET/CMOS logic families and topologies can achieve lower hardware costs and intrinsic delays than CMOS.…”
Section: Introductionmentioning
confidence: 99%
“…Referring to [ 5 , 6 ], a set of hybrid TFET/CMOS logic families and topologies can achieve lower hardware costs and intrinsic delays than CMOS. A single double-gate TFET mentioned in [ 10 , 11 , 12 , 13 , 14 ] can exhibit two-input Boolean logic behaviors, such as Or, And, Or-not, and And-not, so it can achieve two-input logic gates compactly by reducing the number of transistors. For example, the NAND2 and NOR2 logic gates in [ 10 , 13 ] only consist of two TFETs, while four transistors are required for the conventional CMOS.…”
Section: Introductionmentioning
confidence: 99%
“…The XNOR function can be achieved in several ways (Table I), each with its own tradeoffs [5]. Using multiple control gates can enable logic at the device level [12], but requires ambipolar conduction, and is incompatible with lowcost, unipolar fabrication technologies. In TFT realizations, biasing devices deep into the OFF-state is problematic, due to either thin-film material ambipolarity or back-channel conduction, making elegant designs based on pass transistor logic [13] untenable.…”
Section: Introductionmentioning
confidence: 99%