Recent Progress in Understanding the Properties of the Amorphous Silicon/Crystalline Silicon Interface

Abstract

The authors review experimental and modeling approaches developed at GeePs to have a better knowledge and understanding of the interface between hydrogenated amorphous silicon (a‐Si:H) and crystalline silicon (c‐Si) in heterojunction solar cells. The authors emphasize the existence of a strong inversion layer at the c‐Si surface for both (n) a‐Si:H/(p) c‐Si and (p) a‐Si:H/(n) c‐Si heterojunctions. Conductive probe atomic force microscopy reveals the existence of a conductive channel at the c‐Si surface. The analysis of complementary lateral planar conductance and capacitance measurements allows for a better description of the band diagram in both types of heterojunctions especially through the determination of band offset values. Furthermore, the passivation properties of the (i) a‐Si:H buffer layer are studied by modeling the volume defects in a‐Si:H with the defect‐pool model. In particular, the DOS in the very thin (i) a‐Si:H layers is much larger than in bulk (i) a‐Si:H because the Fermi level position favors defect creation. Surface defects in c‐Si at the a‐Si:H/c‐Si interface are then quantified and the general trends of effective lifetime measurements with the (i) a‐Si:H layer thickness can be explained, notably the increase of the effective lifetime in c‐Si with increasing the (i) a‐Si:H buffer thickness.

Electrical scanning probe microscopy approaches to investigate solar cell junctions and devices

“…Data from Ref. [30]. Figure 2 illustrates the topography and the local resistance mapping on the cross-section after a HF dip and for an applied voltage of 1 Volt.…”

Determination of Defect Densities in Thin (i) a‐Si:H Used as the Passivation Layer in a‐Si:H/c‐Si Heterojunction Solar Cells from Static Planar Conductance Measurements

“…www.advancedsciencenews.com www.pss-rapid.com decreases below 10 nm was also suggested from the modeling of the effective lifetime in these structures, assuming that interface defects responsible for recombination of carriers photogenerated in c-Si can be considered as an extension of the DOS in (i) a-Si:H. [36] In conclusion, we have shown that the static planar conductance of (p) a-Si:H/(i) a-Si:H/(n) c-Si structures is very useful as it does not depend on recombination parameters like capture cross-sections, and it allows one to obtain a clear picture of the band bending at the heterojunction. A detailed analysis from both 1D analytical and 2D full numerical calculations was used to determine the evolution of the deep defect density N DB in (i) a-Si:H as a function of the layer thickness.…”

“…Conversely, for the thicker (i) a‐Si:H layer of 50 nm, the value of the valence band tail width cannot be larger than 50 meV, meaning that with such thickness, the deposited material is equivalent to that of the device grade–thick “bulk” material . It is worth mentioning that an increase in the valence band tail width when the (i) a‐Si:H thickness decreases below 10 nm was also suggested from the modeling of the effective lifetime in these structures, assuming that interface defects responsible for recombination of carriers photogenerated in c‐Si can be considered as an extension of the DOS in (i) a‐Si:H …”