Reconfigurable Magnetic Logic Combined with Nonvolatile Memory Writing

Luo, Zhaochu; Lu, Ziyao; Xiong, Chengyue; Zhu, Tao; Wu, Wei; Zhang, Qiang; Wu, Huaqiang; Zhang, Xixiang; Zhang, Xiaozhong

doi:10.1002/adma.201605027

Cited by 39 publications

(34 citation statements)

References 32 publications

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“…Energy loss in common magnetic systems, result, magnetoionic materials have emerged as prominent energyefficient candidates for voltageprogrammable mate rials with potential applications in neuromorphic computing, domainwall logic, magnetic random access memory, and magnetbased labonachip technologies. [3,12,14,19,20] To date, studies on magnetoionic effects in thin metal films have focused primarily on changes in the interfaceperpendicular magnetic anisotropy (PMA) [21][22][23][24][25] and the Dzyaloshinskii-Moriya interaction. [26] There is growing recognition that voltageinduced changes in valency and phase, inherent to magnetoionic effects, can be applied to the magnetic layer beyond the interface.…”

Section: Introductionmentioning

confidence: 99%

Voltage‐Controlled Deblocking of Magnetization Reversal in Thin Films by Tunable Domain Wall Interactions and Pinning Sites

Zehner

Soldatov

Schneider

et al. 2020

Adv Elect Materials

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so far, mainly originates from the elec tric currents utilized to control the mag netic properties. A promising alternative for increasing the energy efficiency of magnetic devices is to control the mag netism by electric fields instead of electric currents. This possibility has triggered intense research into magnetoelectric materials, but much of this is restricted to low temperature and high voltage opera tion and/or complex layer synthesis. [1] More recently, magnetoelectric appro aches involving the voltagegating of mag netic nanostructures via a dielectric oxide or an electrolyte were examined. [1-3] In these approaches, ferro and ferrimagnetic metals or oxides exhibiting Curie tem peratures above room temperature can be used and often only few volts are required during gating. The modulation of mag netic properties in voltagegated magnetic nanostructures is based on either voltage induced capacitive charging or electro chemical (magnetoionic) processes. [2-4] Voltageinduced capacitive charging of a ferromagnetic metal interface causes volatile changes in the sur face electronic band structure that affect the intrinsic magnetic properties in just a few atomic layers. [5-10] In contrast, magneto ionic mechanisms involve voltageinduced ion migration and electrochemical reactions, [2,3,11-13] and can therefore induce very large and nonvolatile magnetic property changes. [12,14-18] As a High energy efficiency of magnetic devices is crucial for applications such as data storage, computation, and actuation. Redox-based (magneto-ionic) voltage control of magnetism is a promising room-temperature pathway to improve energy efficiency. However, for ferromagnetic metals, the magnetoionic effects studied so far require ultrathin films with tunable perpendicular magnetic anisotropy or nanoporous structures for appreciable effects. This paper reports a fully reversible, low voltage-induced collapse of coercivity and remanence by redox reactions in iron oxide/iron films with uniaxial in-plane anisotropy. In the initial iron oxide/iron films, Néel wall interactions stabilize a blocked state with high coercivity. During the voltage-triggered reduction of the iron oxide layer, in situ Kerr microscopy reveals inverse changes of coercivity and anisotropy, and a coarsening of the magnetic microstructure. These results confirm a magneto-ionic deblocking mechanism, which relies on changes of the Néel wall interactions, and of the microstructural domainwall-pinning sites. With this approach, voltage-controlled 180° magnetization switching with high energy-efficiency is achieved. It opens up possibilities for developing magnetic devices programmable by ultralow power and for the reversible tuning of defect-controlled materials in general.

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Section: Introductionmentioning

confidence: 99%

Voltage‐Controlled Deblocking of Magnetization Reversal in Thin Films by Tunable Domain Wall Interactions and Pinning Sites

Zehner

Soldatov

Schneider

et al. 2020

Adv Elect Materials

View full text Add to dashboard Cite

show abstract

“…Various similar kinds of technology are reported in the literature and have been named differently [282][283][284]. Other than that, attempts are being made to develop novel spintronic based reconfigurable logic-memory devices [285][286][287][288]. An innovative multilayer magnetic device Ta/CoFeB/MgO, which combines logic and memory operations, was proposed by Luo et al in 2017.…”

Section: Hybrid Cmos/mtj Circuitsmentioning

confidence: 99%

“…It utilizes both the AHE and negative differential resistance (NDR) phenomenon to perform the various reconfigurable logic operations. It can work at a high speed of GHz range with low energy consumption and expected to break the bottleneck of conventional von-Neumann architecture [286]. At the time of writing this article Pu et al reported the new magnetic logicmemory device by coupling the AHE in magnetic material and insulator-to-metal (ITM) transition in Vanadium dioxide (VO2).…”

Section: Hybrid Cmos/mtj Circuitsmentioning

confidence: 99%

From MTJ Device to Hybrid CMOS/MTJ Circuits: A Review

et al. 2020

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Spintronics is one of the growing research areas which has the capability to overcome the issues of static power dissipation and volatility suffered by the complementary metal-oxide-semiconductor (CMOS) industry. Magnetic tunnel junction (MTJ), one of the prominent spintronic devices, is not only used to develop the fully non-volatile-logic (NV-L) but combines magnetism and electronics to develop next-generation NVmemory (NV-M) and hybrid CMOS/MTJ circuits. To be specific towards hybrid CMOS/MTJ circuits, the fabrication of first hybrid full-adder in 2009, fabrication of MTJ based 240-tile NV-field programmable gate array (NV-FPGA) chip in 2013, fabrication of a 3000-6-input-LUTs based NV-FPGA chip in 2015, fabrication of MTJ based NV-logic-in-memory-large scale integration (NV-LIM-LSI) in 2017 and recently the fabrication of a full hybrid magnetic/CMOS System on Chip (SoC) under EU GREAT Project in 2019 has strengthened the belief and motivated the researcher to be continued in this domain. This review article aims to provide the complete design flow of hybrid CMOS/MTJ circuits developed using one of the fab compatible MTJ spintronic devices and its integration with conventional CMOS logic. The broad coverage of the article is MTJ construction, its switching mechanisms, a brief history of various compact models, reliability issues, and the concept of logic-in-memory (LIM) architecture. Finally, the article concludes with the challenges and future prospects of hybrid CMOS/MTJ circuits, which will motivate people in academia to cultivate research in this domain and industry to realize the prototype for a wide range of potential applications.

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“…[1][2][3][4][5][6] These memories based on the electric programming and erasing have been extensively studied while further development of their practical application is restricted by the high programming/ erasing voltages, which motivates the introduce of the light programming as an exactly novel independent programming method. [1][2][3][4][5][6] These memories based on the electric programming and erasing have been extensively studied while further development of their practical application is restricted by the high programming/ erasing voltages, which motivates the introduce of the light programming as an exactly novel independent programming method.…”

mentioning

confidence: 99%

High‐Performance All‐Inorganic Perovskite‐Quantum‐Dot‐Based Flexible Organic Phototransistor Memory with Architecture Design

Yang

Liu

et al. 2019

Adv Elect Materials

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floating gate organic field effect transistors (OFET)-based memory has been considered to have the most application prospects. [1][2][3][4][5][6] These memories based on the electric programming and erasing have been extensively studied while further development of their practical application is restricted by the high programming/ erasing voltages, which motivates the introduce of the light programming as an exactly novel independent programming method. [7][8][9][10][11] The light programming offers a noncontact programming method and is orthogonal to the electrical read-out process, which provides efficient way to achieve higher accuracy and capacity (multilevel storage) with the high discrepancies between different storage levels. [1] However, organic phototransistor memory (OPTM) currently showed unsatisfying performance such as small memory window and short retention time compared with memories with electric programming and erasing. Moreover, in order to generate sufficient photo-induced charge carriers and subsequent trapped minority charges for large memory window, sufficient photon energy, light intensity (3.5−188 mW cm −2 ), and illumination time (1 s to continuously) was required, which also seriously hindered further development and application of photonic memory. [1,12,13] The basic working mechanism of photonic memories is that the photo-induced charge carriers are trapped into or detrapped from the charge trapping layer across the interface between the active layer and trapping layer during the programming/erasing process, [9] resulting in a shift of threshold voltage during the reading process. Therefore, the performance of OPTM significantly depends upon the non-volatile bistability of the charge-trapping layer and the charge transfer process during the charge-trapping and reading process. [14] However, majority researches of light programming memory currently focused on the design of the charge-trapping layer to increase number of discrete charge-trapping sites such as metallic or semiconducting nanoparticles to improve the memory performance. [15][16][17][18] Little attention has been given to two key factors, "trapped carriers effect" and "interface effect" which were related to the charge transfer process and notably impacted the A novel organic phototransistor memory (OPTM) with architecture design is fabricated with all-inorganic perovskite quantum dots (QDs) as charge trapping layer. The novel architecture enables ultrashort channel length and vertical the charge transfer to effectively suppress both trapped carriers effect and interface effect, two key factors which impact photonic memory performance. Additionally, perovskite QDs are introduced to function as both the charge trapping layer and a UV-light-responsive material that emits visible light that can be subsequently absorbed by the active layer, leading to efficient utilization of UV light to generate trapped charges. OPTM exhibits excellent memory properties under significantly improved light conditions, which is superior to previou...

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Reconfigurable Magnetic Logic Combined with Nonvolatile Memory Writing

Cited by 39 publications

References 32 publications

Voltage‐Controlled Deblocking of Magnetization Reversal in Thin Films by Tunable Domain Wall Interactions and Pinning Sites

Voltage‐Controlled Deblocking of Magnetization Reversal in Thin Films by Tunable Domain Wall Interactions and Pinning Sites

From MTJ Device to Hybrid CMOS/MTJ Circuits: A Review

High‐Performance All‐Inorganic Perovskite‐Quantum‐Dot‐Based Flexible Organic Phototransistor Memory with Architecture Design

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