Reconfigurable Video Processor for Space

Real-time and dependability assessment of hw-accelerated space applications for reconfigurable MPSoCs

“…The fact that requiring fewer changes to recovery mode also benefits the availability. It can be observed how the TMR configuration usage increased the platform's availability allowing it to deliver the same amount of work in less time (the overall test time is less than in the previous table [5][6][7][8][9][10][11][12][13][14][15]. Only one deadline was missed in all the presented tests.…”

“…This work was initiated in the context of the European Enable-S3 (European Initiative to Enable Validation for Highly Automated Safe and Secure Systems) project, where the proposed reconfigurable processor was used to implement representative space applications based on video processing. In this context, the reconfigurable processor proposed in this document was presented as a reconfigurable Video processor [11]. Hyperspectral images compression algorithms developed by La Universidad de las Palmas de Gran Canaria (ULPGC) [4], and Guidance Navigation and Control applications for satellite navigation were implemented using the proposed reconfigurable processor presented in this document in section 3.2.…”

“…Mi ni mum execut i on per i od = W C E T + HW -W C E T + W C -SU P P (2)(3)(4)(5)(6)(7)(8)(9)(10)(11) The CPU utilization of the thread is still dependent only of the WCET. Therefore, the usage of the last equation relaxes the CPU utilization as it is expected when co-processors are employed.…”