Reconfiguration of 1 1/2 track-switch mesh-arrays with PE and bus faults

Horita, Tadayoshi; Takanami, Itsuo

doi:10.1109/dftvs.1996.572041

Cited by 3 publications

(1 citation statement)

References 8 publications

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“…Mazumder et al [12] developed an automatic SRS using an analog neural network for mesh-connected PAs with spares on one row and one column by which faulty PEs are directly replaced. Takanami et al also developed automatic SRSs [13], [14] for meshconnected PAs using single track switches (STSs) proposed by Kung et al [4]. The arrays they dealt with have two rows and two columns of spares, i.e., four linear arrays of spares around a PA to cope with faults of low reliable PEs.…”

Section: Introductionmentioning

confidence: 99%

Self-restructuring Mesh-connected Processor Arrays through Spares on Moved Diagonals, Direct Replacement and Built-in Circuits

Takanami,

Fukushi

2023

Computer

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We present a self-reconfiguring scheme for N × N mesh-connected processor arrays (PAs) with N spares where faulty PEs are directly replaced by spare PEs functionally located on the diagonals which may be moved. This replacement is formalized as a matching problem in graph theory. Then, the necessary and sufficient condition that all the faulty PEs in a PA are replaced (repaired) at the same time is given. Using the condition, a restructuring algorithm is given. By computer simulation, it is shown that the survival rates and the probabilities of the arrays increase so much, comparing with those of the existing network structures with the same number of spare PEs. The scheme is realized by digital circuits which can be built in a PA. The scheme may be useful in enhancing especially the run-time reliability and availability of PAs in mission critical applications where first self-reconfiguration is required without an external host computer and manual maintenance operations.

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