Reducing Computational Complexity in Digital Circuit Designing using Ancient Mathematics: A Review

Pasuluri, Bindu Swetha; Sonti, V.J.K. Kishor

doi:10.1109/delcon54057.2022.9753237

2022 IEEE Delhi Section Conference (DELCON) 2022

DOI: 10.1109/delcon54057.2022.9753237

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Reducing Computational Complexity in Digital Circuit Designing using Ancient Mathematics: A Review

Bindu Swetha Pasuluri

V.J.K. Kishor Sonti

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Design of High-performance GDI Logic Based 8-tap FIR Filter At 45nm CMOS Technology Using Nikhilam Multiplier

Pasuluri

Sonti

2022

International Journal of Mathematical Models and Methods in Applied Sciences

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Over the past few decades, advances in IC technology have steadily shrunk feature sizes, necessitating the placement of more operational circuits on every chip. In designing digital circuits, a novel GDI based circuit is indeed the center of consideration, since it requires less power and achieves greater efficiency. GDI-based circuits mimic CMOS transistors but feature fewer transistors with a greater capacity for performance and reliability. This paper investigates the modelling and implementation of a Finite Impulse-Response (FIR) block developed utilizing GDI-based circuits as well as basic blocks. In this study, an eight-tap FIR architecture relying on GDI cells is created. The results reveal that even a FIR architecture with eight taps and GDI delivers reduced power consumption and performance improvement.

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Design of High-performance GDI Logic Based 8-tap FIR Filter At 45nm CMOS Technology Using Nikhilam Multiplier

Pasuluri

Sonti

2022

International Journal of Mathematical Models and Methods in Applied Sciences

View full text Add to dashboard Cite

show abstract

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Reducing Computational Complexity in Digital Circuit Designing using Ancient Mathematics: A Review

Cited by 1 publication

References 30 publications

Design of High-performance GDI Logic Based 8-tap FIR Filter At 45nm CMOS Technology Using Nikhilam Multiplier

Design of High-performance GDI Logic Based 8-tap FIR Filter At 45nm CMOS Technology Using Nikhilam Multiplier

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