Reducing fine-grain communication overhead in multithread code generation for heterogeneous MPSoC

Abstract

Heterogeneous MPSoCs present unique opportunities for emerging embedded applications, which require both high-performance and programmability. Although, software programming for these MPSoC architectures requires tedious and error-prone tasks, thereby automatic code generation tools are required. A code generation method based on fine-grain specification can provide more design space and optimization opportunities, such as exploiting fine-level parallelism and more efficient partitions. However, when partitioned, fine-grain models may require a large number of inter-processor communications, decreasing the overall system performance. This paper presents a Simulink-based multithread code generation method, which applies Message Aggregation optimization technique to reduce the number of interprocessor communications. This technique reduces the communication overheads in terms of execution time by reduction on the number of messages exchanged and in terms of memory size by the reduction on the number of channels. The paper also presents experiment results for one multimedia application, showing performance improvements and memory reduction obtained with Message Aggregation technique.

ILP Based Multithreaded Code Generation for Simulink Model

“…The proposed techniques are implemented based on LESCEA multithreaded code generator of the Simulinkbased MPSoC design platform [1], [21], [22]. Multithreaded code generator takes a Simulink Model as an input and generates a set of software thread codes, and builds software stacks fit to corresponding scheduling results and the target hardware architecture.…”

“…In order to avoid deadlock, global scheduling [1], [21], [22] is the most general strategy, where all blocks in the model are scheduled together, no matter whether they are in the same thread. Global scheduling concerns more between threads, so it may decrease the scheduling speed.…”

Software Pipeline–Based Partitioning Method with Trade-Off between Workload Balance and Communication Optimization

“…The proposed techniques have been implemented based on the LESCEA multithreaded code generator of the Simulinkbased MPSoC Design Platform [12], [26]- [27]. The multithreaded code generator takes a Simulink model as an input and generates a set of software thread codes.…”

Enabling Network Security in HPC Systems Using Heterogeneous CMPs

“…Several optimization techniques are extended to utilize advanced architecture features of the target system. In [9], the authors present a multithreaded code generation method that tries to reduce the number of interprocessor communications. They primarily try to reduce the number of messages exchanged, thereby reducing the total communication between the cores.…”