Reducing the turn-on time and overshoot voltage for a diode-triggered silicon-controlled rectifier during an electrostatic discharge event

The comprehensive understanding of the structure-dependent electrostatic discharge behaviors in a conventional diode-triggered silicon controlled rectifier (DTSCR) is presented in this paper. Combined with the device simulation, a mathematical model is built to get a more in-depth insight into this phenomenon. The theoretical studies are verified by the transmission-line-pulsing (TLP) test results of the modified DTSCR structure, which is realized in a 65-nm complementary metal-oxide-semiconductor (CMOS) process. The detailed analysis of the physical mechanism is used to provide predictions as the DTSCR-based protection scheme is required. In addition, a method is also presented to achieve the tradeoff between the leakage and trigger voltage in DTSCR.

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Reducing the turn-on time and overshoot voltage for a diode-triggered silicon-controlled rectifier during an electrostatic discharge event

Cited by 8 publications

References 6 publications

Statically triggered 3×VDD-Tolerant ESD detection circuit in a 90-nm low-voltage CMOS process

Statically triggered 3×VDD-Tolerant ESD detection circuit in a 90-nm low-voltage CMOS process

28 nm CMOS process ESD protection based on diode-triggered silicon controlled rectifier

Structure-dependent behaviors of diode-triggered silicon controlled rectifier under electrostatic discharge stress

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