2001
DOI: 10.1016/s0026-2714(01)00052-x
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Reduction of boron penetration through thin silicon oxide with a nitrogen doped silicon layer

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Cited by 6 publications
(2 citation statements)
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“…[9][10][11] In previous works, we have proposed an original solution by the insertion of a nitrogen-doped layer (NIDOS) between the polySi gate and the insulator. [12] The main advantages of this two-layer gate engineering approach are controlling the nitrogen concentration in the 4-nm-thick NIDOS layer during the LPCVD deposition and the large grain size of the amorphous as-deposited silicon film at low temperature with disilane gas source. Gate depletion has been observed when using the standard boron implantation=annealing process to electrically activate the Pþ gate, even without the NIDOS film at the interface, and boron penetration was reduced when using the NIDOS film.…”
Section: Introductionmentioning
confidence: 99%
“…[9][10][11] In previous works, we have proposed an original solution by the insertion of a nitrogen-doped layer (NIDOS) between the polySi gate and the insulator. [12] The main advantages of this two-layer gate engineering approach are controlling the nitrogen concentration in the 4-nm-thick NIDOS layer during the LPCVD deposition and the large grain size of the amorphous as-deposited silicon film at low temperature with disilane gas source. Gate depletion has been observed when using the standard boron implantation=annealing process to electrically activate the Pþ gate, even without the NIDOS film at the interface, and boron penetration was reduced when using the NIDOS film.…”
Section: Introductionmentioning
confidence: 99%
“…[4][5][6][7] Fulfilling these objectives require not only to shrink the transistor dimensions, but also to introduce new materials and structures able to preserve the quality of the gate/oxide interface and to keep the deep diffusion of B impurities far from the oxide layer. Several solutions have been proposed in MOS structure such as replacing the Si oxide layer by high dielectric permittivity materials, [8][9][10] varying the elaboration method, the doping techniques and thermal annealing [11][12][13] or using multilayer gate transistors. 14) In a previous work, we studied the influence of low temperature annealing durations on B diffusion in multilayer B-doped polycrystalline silicon (poly-Si) (poly1)/undoped amorphous silicon (a-Si) (poly2)/Si oxide (SiO 2 ) deposited by LPCVD.…”
Section: Introductionmentioning
confidence: 99%