Reduction of Low Frequency Noise of Buried Channel PMOSFETs With Retrograde Counter Doping Profiles

Fujii, Shuntaro; Sakamoto, Toshiro; Morita, Soichi; Miyazaki, Tsutomu

doi:10.1109/jeds.2024.3430308

IEEE J. Electron Devices Soc.

2024

DOI: 10.1109/jeds.2024.3430308

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Reduction of Low Frequency Noise of Buried Channel PMOSFETs With Retrograde Counter Doping Profiles

Shuntaro Fujii,

Toshiro Sakamoto,

Soichi Morita

et al.

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Reduction of Low Frequency Noise of Buried Channel PMOSFETs With Retrograde Counter Doping Profiles

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References 35 publications

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