Reduction of plasma-induced damage in n-type GaN by multistep-bias etching in inductively coupled plasma reactive ion etching

Abstract

Plasma-induced damage was reduced by multistep-bias etching that involved a stepwise decrease of the etching bias power (Pbias) and subsequent annealing. The depth of damage at Pbias = 60 W was determined to be 60 nm from the capacitance–voltage characteristics of Ni/Al2O3/etched-GaN metal-oxide-semiconductor diodes. The damaged layer was removed by subsequent etching at Pbias = 5 W and 2.5 W. The residual and shallow damage induced by the low Pbias was then recovered by subsequent annealing at 400 °C. The multistep-bias etching of inductively coupled plasma reactive ion etching was thus confirmed to be effective for achieving a high etching rate with low damage.

Depth profiling of surface damage in n-type GaN induced by inductively coupled plasma reactive ion etching using photo-electrochemical techniques

“…We previously proposed a multistep-bias etching method that involved a stepwise decrease in the etching bias power (P bias ). 12) By measuring the electrical characteristics of Schottky barrier diodes (SBDs) and MOS diodes formed on the dry-etched GaN surface, we confirmed that the proposed method effectively reduced the dry-etching damage. And we also found that the damage depth induced by the single-step dry-etching at P bias = 60 W was approximately 60 nm.…”

“…The etching conditions were as follows. The reactive gas was chlorine (Cl 2 , 30 sccm) and the chamber pressure was 1 Pa; the temperature of the coolant in the chiller used to stabilize the temperature of the sample stage was 20 °C; the ICP power was constant at 200 W; P bias was 30 W for the single-step etching and 30 W + 5 W for the twostep etching, where the etching depths were 200 nm at P bias = 30 W and 100 nm at P bias = 5 W. As we reported previously, 12) high P bias induced more severe damage and formed a deep damaged layer beneath the GaN surface. Therefore, P bias = 5 W in the second-step etching removed the damaged layer induced at P bias = 30 W and the resultant damage depth for the two-step sample was shallower.…”

“…With this method, however, evaluating the damage induced at low P bias was difficult because of its insufficient sensitivity, consistent with our previous report. 12) With respect to electrical characterization, C-V and electrochemical impedance spectroscopy (EIS) techniques have been widely used to evaluate the surface conditions not only for GaN 24,25) but also for other semiconductors. [26][27][28][29] In this study, we use a combination of incremental PEC etching and in situ the C-V and EIS measurements to quantify the dry-etching damage depth in the GaN surface, which less than 10 nm.…”

“…And it was improved by the subsequent low P bias = 5 W, which removed the damaged layer induced by P bias = 30 W. These results are consistent with the previous report. 12) Figures 3(b) and 3(c) show the 1/C 2 -V plots for these dry-etched samples after PEC etchings in increments of 10 nm. The V bi for the sample with P bias = 30 W gradually improved and recovered by the fifth PEC etching to the value (1.01 V) almost equal to that for the as-grown sample (1.02 V).…”

Photoluminescence and scintillation properties GaN

“…33) As is well-known, pulse height spectrum is the most important feature of scintillation detectors. Up to now, there have been many researches on optoelectronic properties of GaN [34][35][36][37][38][39][40][41] while the number of studies on scintillation properties is limited. 33,[42][43][44][45][46][47] Among these past works, only one paper reported a pulse height spectrum by scintillation of GaN but under neutron irradiation 47) and the LY was not determined quantitatively, most likely due to low LY.…”