Reduction of postdevelop defects and process times for DUV lithography

Abstract

As the semiconductor industry moves into deeper sub -quarter micron regime, minimization of post develop process defects is of paramount significance in manufacturing environments. Reduced defect levels can significantly increase the yield in production, resulting in substantial cost savings and also reduce time to market of new devices. Typical approaches to reduce defect levels include extension of the DI (De-lonized water) rinse time immediately after completion of photoresist development, use of multiple rinse steps and variable rinse spin speed. However, many of these penalize the process throughput. The uniqueness of this project was the use of enhanced rinse hardware with a mechanistic understanding and characterization of defect generation for an advanced DUV resist.Numerous studies have identified the development step as the source of the majority of the post-development particles and residues. Thus improving the development-and-rinse step can potentially reduce particle contamination. Defect reduction was accomplished thorough process characterization of defect sources and also through implementation of enhanced rinse hardware. Our enhanced hardware provides an improved rinsing action and a more uniform coverage and reduces the impact forces near each orifice through its optimized geometry. A partial-six factor DOE (Design of Experiment) was implemented with a resolution of first order terms and 2nd factor interactions. Factors examined included rinse spin speed, rinse time, acceleration during dry cycle, nozzle type, rinse time algorithm and chemical injection time The processing system was an advanced SVG Track clustered with a Micrascan II system. This project successfully characterized defect density performance and located the lowest defect level and shortest rinse time from a develop process standpoint, without any impact on CD's. The defect density levels were reduced by a factor of 7 and the develop process time was reduced by 23 %. This was qualified for 0.2-micron defect sizes and larger which is applicable to .25 micron lithography. The yield impact of this defect reduction for killer defects is significant cost savings. In addition, the reduced develop process time can significantly increase the throughput because the develop process is the rate limiting step in a Track system.

Effect of Rinse Process on Removal of Crown Type Defects during Photoresist Development

“…The crown defects were easily found as photo resist residue after etch process by blocking the gate or undefined hole patterns after DUV and i-line resist development. [17][18][19] Table I. The typical photolithography process conditions for (a) gate and (b) hole pattern formation.…”

“…There have been several techniques proposed in the literature to reduce or eliminate crown defects. It includes the optimization of the development and rinse steps (number of development puddles, spin speed during rinse and rinse time), 17,18) the use of surfactant-containing developers 12) and the use of water-soluble resist overcoat layers. 5) For the production application the rinse time optimization has chosen because it is simple and requires minimum modification of existing processes to reduce the crown defect.…”

“…Cluster defects originate from non-optimized process flows, design rule violations and photomask related pattern or reticle defects. [17][18][19] However, the random defects are caused by contamination sources such as the process and equipment. 17) The cluster defects are observed to be little, as most of the defects present are random defects.…”

Evaluation of a new-generation photomask develop system for CAR

“…Developer residue defects have been observed in previous investigations, along with formation theories and methods to reduce them. [13][14][15][16] Developer residue defects have also been observed on a similar PEK130 DUV process at one of AMTC's partner companies. 12 Although only a few defects resembling develop residue particles were observed at ADI with DUV exposed PEK130 masks processed in the TEL alpha develop tool, eliminating these is critical to meet and maintain a high mask yielding process.…”

“…13: The response of CDU and mean CD using LD nozzle scan speed, developer temperature and delay between PEB and develop as factors. .…”