Reduction of the thermal budget of AlGaN/GaN heterostructures grown on silicon: A step towards monolithic integration of GaN‐HEMTs with CMOS

Abstract

Phone: þ33 493 954 200, Fax: þ33 493 958 361In this paper, we investigate the reduction of thermal budgets associated with the growth of GaN high electron mobility transistor (HEMT) heterostructures. The reduction of such thermal budgets is desirable for the monolithic integration of GaN-HEMT with CMOS circuits, when the latter are fabricated first. Indeed, due to the elevated temperatures required for the growth of III-nitrides, the characteristics of the integrated CMOS devices may drift during the process. In order to determine in which extend the growth thermal budget could be reduced without penalty on the performances of GaN-HEMTs, different structures were grown by ammonia-molecular beam epitaxy (ammonia-MBE) with standard and reduced growth temperatures. The epitaxial structures were then compared with regards to their structural and electrical properties. The present work sets the limit for a potential trade-off between Si-CMOS and GaN-HEMTs degradation in a CMOS-first monolithic integration scenario.

Development of technological building blocks for the monolithic integration of ammonia-MBE-grown GaN-HEMTs with silicon CMOS

“…Thus, the higher AlN growth temperature may have promoted the diffusion of silicon from the substrate into AlN nucleation layer. This could explain the lower leakage currents as well as the larger breakdown voltages that have been measured previously on HEMT devices when lowering the AlN growth temperature . On the other hand, the concentrations are quite similar and around 1 × 10 16 cm −3 in the GaN buffer layer for all samples.…”

“…). Reverse bias leakage currents are also presented at a source–drain voltage V DS = 5 V. At V GS = −7 V, the drain leakage current is near 2 × 10 −6 A/mm which is comparable to 1.2 × 10 −6 A/mm, the values obtained on the low‐temperature planar growth thin structure in . This is more than one order of magnitude larger than the buffer leakage current obtained on isolation patterns.…”

“…For thin structures, crack‐free GaN surfaces were obtained. The RMS roughness values for Types A and B samples were 1.4 and 1.2 nm, respectively, which are normal values for standard epitaxy of thin structures . Also, the morphology of the III‐nitrides layers deposited on the dielectric mask was examined.…”

“…Metalorganic chemical vapor deposition (MOCVD) is the main technique used in the GaN industry but it requires temperatures in excess of 1000 °C not compatible with a stable CMOS process . For this reason, we have developed a low thermal budget growth process relying on the ammonia‐source molecular beam epitaxy (ammonia‐MBE) technique .…”

Influence of AlN Growth Temperature on the Electrical Properties of Buffer Layers for GaN HEMTs on Silicon

“…More, 900°C is already too high for the monolithic integration of III‐Nitride devices with Silicon devices in a CMOS first approach due to dopant diffusion . In this context, reducing the growth temperature of AlN is mandatory and the attempts we performed led to conclude that AlN can be grown by NH 3 ‐MBE with limited degradation of the crystal quality in the 830–850°C temperature range . In order to assess the influence of AlN growth temperature on the electrical properties, AlGaN/GaN HEMTs with thin and thick GaN buffer layers were grown.…”