2018 IEEE International Conference on Software Quality, Reliability and Security Companion (QRS-C) 2018
DOI: 10.1109/qrs-c.2018.00103
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Regular Expression Based Test Sequence Generation for HDL Program Validation

Abstract: This paper proposes a test sequence generation approach for behavioral model validation of sequential circuits implemented in Hardware Description Language (HDL). In the procedure of test sequence generation proposed in this study, Regular Expressions (REs) are utilized to model the behavior of the System Under Test (SUT). First, the HDL program is converted to a Finite State Machine (FSM). Then, the obtained FSM is transformed to RE which is represented by a Syntax Tree (ST). In this way, the test sequence ge… Show more

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Cited by 13 publications
(13 citation statements)
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References 18 publications
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“…The proposed approach is called PQTestGen in the corresponding tables. We also utilized the RETestGen [64] tool for test generation. However, RETestGen resulted in excessive size test suites, which were unable to execute on the GUI under test at the acceptable times.…”
Section: Discussionmentioning
confidence: 99%
“…The proposed approach is called PQTestGen in the corresponding tables. We also utilized the RETestGen [64] tool for test generation. However, RETestGen resulted in excessive size test suites, which were unable to execute on the GUI under test at the acceptable times.…”
Section: Discussionmentioning
confidence: 99%
“…Kilincceker et al [6] introduce RE as being a modelbased testing method and use RE to model hardware design combined with RE-based test generation. RE is represented by an abstract syntax tree and a tree traversal algorithm is used in the test generation.…”
Section: A Model Based Gui Testingmentioning
confidence: 99%
“…Model-based testing is a testing method that executes test cases generated from the abstract view of a system under test (SUT). This abstraction specifies the behavior of the system so we can model it with one of the different models such as Finite State Machine (FSM) [1], Event Sequence Graph (ESG) [4] [5], Event Flow Graph (EFG) [2] [3], and Regular Expression (RE) [6] [7]. The major benefit is, code-based testing is a time consuming and error-prone method to cover all cases of the SUT while we can generate and run test sequences efficiently with model-based testing.…”
Section: Introductionmentioning
confidence: 99%
“…Kilincceker et al 26 utilize regular expressions for validating circuits implemented in HDL (Hardware Description Language). The source code of the HDL program is automatically analyzed, scanning each line to find particular patterns that represent states, which are added to an FSM (finite state machine).…”
Section: Related Workmentioning
confidence: 99%