Relaxation of strained Si layers grown on SiGe buffers

Abstract

Thin strained Si layers grown on SiGe layers graded to 20% Ge were studied for resistance to relaxation. It was observed that in the presence of ∼105/cm2 threading dislocations from the underlying graded layers, the barrier to misfit dislocation formation is sufficiently reduced to induce relaxation in Si layers even when the layer thickness is less than the predicted critical thickness. Raman spectroscopy revealed that elastic strain accumulation in the uniform SiGe layers is a significant contributor to strain relaxation in the Si cap layers. Upon annealing, thermal mismatch causes the Si layers to relax further, but most of the strain relaxation is accommodated by elastic strain increase in the SiGe layers. This prevents the rampant increase in defect density that would otherwise accompany the strain relaxation. Annealing in an oxidizing ambient appears to pin pre-existing threading dislocations causing nucleation of new threading dislocations and short misfit segments to relieve the thermal mismatch stresses.

Inhomogeneous distribution of dislocations in a SiGe graded layer and its influence on surface morphology and misfit dislocations at the interface of strained Si∕Si0.8Ge0.2

“…8 To improve the quality of a strained Si layer on a SiGe virtual substrate, the distribution of dislocations in a graded SiGe layer is characterized using electron beam induced current ͑EBIC͒. A crosshatch pattern of dark and bright bands running along the two ͗110͘ directions is observed in an EBIC image taken with a 25-keV-electron beam at 80 K. These dark and bright EBIC bands are attributed, respectively, to high-and low-density dislocation regions in the graded SiGe layer, as is confirmed by transmission electron microscopy.…”

“…From bottom to top, the sample consisted of three layers: a 4-m-thick graded Si 1−x Ge x layer ͑reaching a 20% Ge composition͒; a 1 m relaxed uniform Si 0.8 Ge 0.2 buffer layer; and a 30 nm strained Si layer. The strained Si layer was chosen so as to exceed the Matthews-Blakeslee critical thickness 8 We characterized the planar distribution of the underlying dislocations in the graded SiGe by EBIC. Details of the EBIC system are described elsewhere.…”

Relaxation of strained silicon on Si0.5Ge0.5 virtual substrates

“…As in previous reports, 6,7 this shows that strain is not being relieved by islanding and the ultimate smoothness of the tensile strained layer is determined by the platform on which it is produced.…”

“…Layers in excess of the critical thickness for dislocation nucleation 5 considered in these studies unexpectedly show few dislocation nucleation events. [6][7][8] Here we present an investigation of the relaxation processes of highly strained silicon on 50% VSs, which offers further potential improvements for MOSFETs especially the p-channel. As a wider channel reduces carrier scattering, we particularly look at thick layers ͑up to 70 nm͒ for which a different mode of relaxation is found.…”

Effect of Si interface surface roughness to the tunneling current of the Si/Si1-xGex/Si heterojunction bipolar transistor

“…Many problems have to be overcome in high quality Si and SiGe layers with perfectly flat and abrupt interfaces without noticeable intermixing. One of the challenges for globally strained Si/SiGe is material quality since epitaxial growth of strained layers on relaxed virtual substrate leads to surface roughness 2,3 . Si grown on SiGe virtual substrate will meets an interfacial mixing because of the surface segregation of Ge atoms.…”