Reliability analysis and yield enhancement of resistive random access memory with adaptive incremental step pulse programming sizing

Abstract

We investigated the reliability of resistive random access memory (ReRAM) under two different types of incremental step pulse programming (ISPP) along with the yield enhancement by the customized programming pulses based on the susceptibility of memory cells. Adaptive step-size control of ISPP enabled by an analog-to-digital converter (ADC) based sense amplifier significantly reduces the cycling disturbance by 54% because of the decreased number of effective write accesses. The programming yield of ReRAM was further improved with a proposed write scheme. The defective ReRAM cells are classified as soft fail cells and hard fail cells by the ADC-based sense amplifier, and soft fail cells are rescued by using a modified programming pulse. Measurements verified that the programming yield drop of 3% is completely recovered by the program pulse shaping.

Pt/Ta2O5/HfO2−x/Ti Resistive Switching Memory Competing with Multilevel NAND Flash

“…The F / R ratio was as high as 10 6 over ≈3 V span. Another critical merit of this ReRAM is that its resistance values can be controlled by the amount of trapped (or detrapped) charges, so the industry standard incremental step pulse programming (ISPP) technique can be used …”

Multilevel resistive switching nonvolatile memory based on MoS 2 nanosheet-embedded graphene oxide

“…To note, because our endurance test was performed in the worst case condition through the I-V sweeping to confirm the durability, some variation was caused by uncontrolled charges during switching cycles. However, the distinguishable intermediate states could be achieved by using the industry standard incremental step pulse programming (ISPP) technique in the practical applications [57,58]. Furthermore, the I-V characteristics of our device were maintained for at least six months after fabrication (figure S5).…”