“…Since being introduced by Infineon in 2001 [1], because of the advantages of better thermal and electrical performance, lower cost, and good feasibility, fan-out wafer-level package (FOWLP) technology has been widely used in millimeter-wave applications [2][3][4][5][6][7][8]. Thanks to the researchers, various types of FOWLP have emerged: Freescale proposed the redistributed chip package in 2007 [9], IME extended the technology to multi-die packaging in 2008 [10] and demonstrated the reliability of 3D FOWLP [11], a package-on-package concept with the FOWLP was proposed by STATS ChipPAC in 2012 [12], TSMC also developed their InFo wafer-level packaging [13,14] at basic of the FOWLP, and in 2014, the Infineon applied the through encapsulant via (TEV) in embedded wafer level ball grid array (eWLB) for vertical interconnection [15].…”