2019 International Wafer Level Packaging Conference (IWLPC) 2019
DOI: 10.23919/iwlpc.2019.8914100
|View full text |Cite
|
Sign up to set email alerts
|

Reliability and Performance of Wafer Level Fan Out Package for Automotive Radar

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1

Citation Types

0
4
0

Year Published

2020
2020
2024
2024

Publication Types

Select...
4
2

Relationship

0
6

Authors

Journals

citations
Cited by 10 publications
(4 citation statements)
references
References 20 publications
0
4
0
Order By: Relevance
“…Surface-mount packages like the eWLB shown in Fig. 13 have proven to be low-cost and reliable, while providing good RF performance of the chip-to-PCB transition up to 80 GHz [58]. The chip is placed into a mold compound that forms the package, with the contacts of the chip facing to the surface.…”
Section: Technologymentioning
confidence: 99%
“…Surface-mount packages like the eWLB shown in Fig. 13 have proven to be low-cost and reliable, while providing good RF performance of the chip-to-PCB transition up to 80 GHz [58]. The chip is placed into a mold compound that forms the package, with the contacts of the chip facing to the surface.…”
Section: Technologymentioning
confidence: 99%
“…Since being introduced by Infineon in 2001 [1], because of the advantages of better thermal and electrical performance, lower cost, and good feasibility, fan-out wafer-level package (FOWLP) technology has been widely used in millimeter-wave applications [2][3][4][5][6][7][8]. Thanks to the researchers, various types of FOWLP have emerged: Freescale proposed the redistributed chip package in 2007 [9], IME extended the technology to multi-die packaging in 2008 [10] and demonstrated the reliability of 3D FOWLP [11], a package-on-package concept with the FOWLP was proposed by STATS ChipPAC in 2012 [12], TSMC also developed their InFo wafer-level packaging [13,14] at basic of the FOWLP, and in 2014, the Infineon applied the through encapsulant via (TEV) in embedded wafer level ball grid array (eWLB) for vertical interconnection [15].…”
Section: Introductionmentioning
confidence: 99%
“…Currently, the transition for chip-package-board or package-board in FOWLP have been studied by many researchers, like in [4,5,[24][25][26]. In [4], a channel from microstrip on the chip to microstrip on PCB was simulated, and the simulated loss is about 2 dB from 56 GHz to 70 GHz.…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation