Reliable and efficient PUF‐based cryptographic key generator using bit self‐tests

Abstract

This Letter proposes a reliable and lightweight key generator based on a novel bit-self-test arbiter physically unclonable function (BST-APUF). The BST-APUF adds a delay detection circuit into a classical APUF to automatically test the delay deviation that produces each bit of the PUF response and generates a reliability-flag for each response to indicate its reliability. The key generator collects robust responses and produces a secure key using a cryptographic entropy accumulator. FPGA implementation results show that the overhead and the helper data length of the authors proposed key generator are significantly lower than that of the state-of-the-art schemes when generating a 128-bit key with a bit error rate of 10 −9. Notations C i , R i , F i challenge, response, reliability-flag T c delay threshold generated by threshold generator ΔT delay difference between the upper and lower paths ⊙ exclusive-NOR (XNOR) operation MUX, DMUX multiplexer, demultiplexer REG, LFSR, NVM register, linear feedback shift register, non-volatile memory Introduction: Physically unclonable functions (PUFs) promise to be critical hardware primitives that can be used to provide unique identities or produce and store cryptographic keys against tamper attacks for IoT devices [1]. However, PUF outputs are unreliable across environmental variations (voltage and temperature); and thus, cannot be used directly as keys. The error correction code (ECC) mechanisms are required to extract the stable keys from the noise data. However, most of ECC implementations are too expensive for resource-constrained IoT devices with potential safety hazards [2]. In this Letter, we propose an efficient and reliable Arbiter PUF (APUF) using bit self-test strategy and present a reliable and lightweight key generator based on the proposed PUF without using any ECC mechanisms.

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