Reliable CMOS adaptive equalizer for short-haul optical networks

Design criteria for loop filters in spectrum balancing technique-based adaptive equalisers

“…In [5], the values proposed for the filter bandwidths are 15 and 300 MHz for a 1 Gbps signal; this result agrees with the criterion proposed in this paper.…”

“…When a different spectrum separation scheme is used, whether it is the combination of a LPF and an all-pass filter (APF) [2,8], two band-pass filters (BPF) [9], or two LPFs [5], the choice of the filter bandwidths is not straightforward, and typically a trial and error method is used. In the following section a general criterion will be extracted for a proper choice of these values.…”

“…The most widely used adaptive equaliser architectures are based on the spectrum balancing technique [5]. Their operation principle is founded on the fact that power spectrum of an ideal data stream is known in advance; as a consequence, this information can be used to compare it to the actual power spectrum of the transmitted signal to act on it to correct the pernicious effects caused by the channel.…”

A new equalizer for 2 Gb/s short-reach SI-POF links

“…However, these topologies present lower common-mode rejection ratio (CMRR) than the degenerated differential pair, which can become a problem for the correct operation of the front-end. Some structures with a CMRR similar to the degenerated differential pair have also been proposed 13 . In this work we present a high-speed low-power continuous-time linear equalizer that overcomes the main problems of the previous topologies reducing the number of transconductors used, reducing complexity and power consumption.…”

A multi-rate continuous-time adaptive equalizer for high-speed serial links

“…3,4 However, in the former category, the problem caused by the imbalanced swing between the input and output of the slicer in conventional architectures, and the extra analog blocks to overcome it, 5, 6 can significantly raise the design complexity, area and power consumption. By removing the slicer as in the latter category, the imbalance problem can be overcome with relaxed design specifications and a lower power consumption as proposed in.…”