Reliable flight computer for sounding rocket with dual redundancy: design and implementation based on COTS parts

Kahe, Ghasem

doi:10.1007/s13198-017-0584-x

Cited by 4 publications

(5 citation statements)

References 15 publications

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“…TMR is a hardware/software solution widely used in the onboard computer (OBC) present in aerospace systems such as satellites, spacecraft, and aircraft. Besides, the additional hardware required, another disadvantage of TMR is its large memory overhead [ 11 ]—three times the real capacity is required for redundancy. TMR can be employed to meet the reliability and safety requirements needed in critical systems.…”

Section: Introductionmentioning

confidence: 99%

A Lightweight Method for Detecting and Correcting Errors in Low-Frequency Measurements for In-Orbit Demonstrators

Cifredo-Chacón,

Guerrero-Rodríguez,

Mateos

2024

Sensors

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In the pursuit of enhancing the technological maturity of innovative magnetic sensing techniques, opportunities presented by in-orbit platforms (IOD/IOV experiments) provide a means to evaluate their in-flight capabilities. The Magnetic Experiments for the Laser Interferometer Space Antenna (MELISA) represent a set of in-flight demonstrators designed to characterize the low-frequency noise performance of a magnetic measurement system within a challenging space environment. In Low Earth Orbit (LEO) satellites, electronic circuits are exposed to high levels of radiation coming from energetic particles trapped by the Earth’s magnetic field, solar flares, and galactic cosmic rays. A significant effect is the accidental bit-flipping in memory registers. This work presents an analysis of memory data redundancy resources using auxiliary second flash memory and exposes recovery options to retain critical data utilizing a duplicated data structure. A new and lightweight technique, CCM (Cross-Checking and Mirroring), is proposed to verify the proper performance of these techniques. Four alternative algorithms included in the original version of the MELISA software (Version v0.0) are presented. All the versions have been validated and evaluated according to various merit indicators. The evaluations showed similar performances for the proposed techniques, and they are valid for situations in which the flash memory suffers from more than one bit-flip. The overhead due to the introduction of additional instructions to the main code is negligible, even in the target experiment based on an 8-bit microcontroller.

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Section: Introductionmentioning

confidence: 99%

A Lightweight Method for Detecting and Correcting Errors in Low-Frequency Measurements for In-Orbit Demonstrators

Cifredo-Chacón,

Guerrero-Rodríguez,

Mateos

2024

Sensors

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“…When this switch mechanism fails, the system is converted into a nonredundant system. Kahe 12 presented the design and implementation of a dual-redundant reliable flight computer based on commercial off-the-shelf (COTS) components. Zhang et al 13 proposed a method to realize the reliable and accurate dynamic feed-forward control of a spray-painting robot for airplane wings with large workspace and time-varying dynamics.…”

Section: Introductionmentioning

confidence: 99%

Design and reliability analysis of the electrical control system of the subsea control module

Wang

Lizhang

et al. 2019

Proceedings of the Institution of Mechanical Engineers, Part I:

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The subsea control module is the core equipment of the subsea production system, and its electrical control system plays a large role in the failure modes of the subsea control module. Based on a traditional nonredundant programmable logic controller system, a parallel cross-redundancy system is proposed, designed and tested for the electrical control system of the subsea control module to enhance the reliability of the subsea control module within the given space. A success-oriented system decomposition method is proposed on the basis of the reliability block diagram and system logical relationship that effectively reduces the system dimension and solves the problem of the system state-space explosion caused by the number of system components in the Markov model, and the system reliability and mean time to failure models are created. The reliability model is solved by a Markov model successfully. Finally, the redundancy of the system is tested to validate the logical relationship in the reliability model. The reliability and mean time to failure of the system are analyzed in MATLAB. The tests and analysis show that the proposed parallel cross-redundancy system is better than the double hot-standby system, as demonstrated by a higher reliability and longer mean time to failure, and the module failure rate effects have been minimized.

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“…Average availability levels of 99.999% have been observed for NonStop servers [2]. In [3,4], the abundant on-chip processor cores are exploited for redundant hardware in transaction processing, which provides native support for error detection and recovery against soft errors. Their experimental evaluations confirm the effectiveness of the proposed redundant architecture in achieving low cost reliable computing against soft errors with moderate performance, area and power overheads.…”

Section: Introduction *mentioning

confidence: 99%

“…In case of Xilinx radiation-tolerant FPGAs, all single-event phenomena are taken into account either through the www.IJRRS.com radiation-tolerant manufacturing and processing steps or through TMR technique. Authors in paper [18,4] evaluate the efficiency and performance of a dual-core lockstep ARM for fault-tolerance running FreeRTOS applications. The method was implemented on a dualcore ARM microcontroller embedded into the Zynq-7000 FPGA.…”

Section: Introduction *mentioning

confidence: 99%

“…Therefore, an affordable and accessible method to design a reliable OBC is redundancy. Dual redundant system based on COTS components, as the simplest redundant method, can cover only a limited level of reliability for critical applications [20,4]. Consequently, to cover the reliability requirement of mission critical aerospace applications, it is necessitate more level of redundancy like TMR.…”

Section: Introduction *mentioning

confidence: 99%

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Triple-Triple Redundant Reliable Onboard Computer Based on Multicore Microcontrollers

Kahe

2018

Int J Reliabl Risk Safe Theory App

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The flight control system must meet extremely high levels of functional integrity and availability. The control algorithm is processed by onboard computer (OBC). To meet the reliability requirements for onboard computers, various type of redundancy must be employed. In this paper, we concerned with the triple modular redundancy (TMR) for an onboard computer with aerospace application. In the proposed architecture, control inputs and system states are measured using designated sensors. According to the acquired data, mission scenario and control algorithm are processed by the processing unit. Thereafter, the results are applied to the system by actuators.TMR technology in component level is used to improve the reliability of OBC according to the system requirements. All of the constituent modules of OBC, comprising processing unit, bus interface, sensor, actuators, and IO devices, benefits from triple redundancy. The case study shows that the similar architecture is used for high reliable flight computer of passenger airplanes except that our architecture is based on the available multicore microcontrollers. The reliability of the designed onboard computer is evaluated analytically, which indicates that the proposed OBC can meet the reliability requirements.

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Reliable flight computer for sounding rocket with dual redundancy: design and implementation based on COTS parts

Cited by 4 publications

References 15 publications

A Lightweight Method for Detecting and Correcting Errors in Low-Frequency Measurements for In-Orbit Demonstrators

A Lightweight Method for Detecting and Correcting Errors in Low-Frequency Measurements for In-Orbit Demonstrators

Design and reliability analysis of the electrical control system of the subsea control module

Triple-Triple Redundant Reliable Onboard Computer Based on Multicore Microcontrollers

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