2024
DOI: 10.3390/electronics13040784
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Research on Implementation of a PWM Generation Algorithm for Train Stationary Stopping Frequency

Euntaek Han,
Changsik Park,
Ikjae Kim
et al.

Abstract: In industrial electronic equipment or communication equipment, a reference clock should be generated for stable operation of the equipment, which requires precise and stable reference frequency generation. As a method for generating this reference frequency, an analog method called PLL (phase locked-loop) has been devised and widely used. However, in order to make a more precise and stable reference frequency simple and economical, a DDS (direct digital synthesizer) has been developed. In this paper, we propos… Show more

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