Reservoir Computing with Charge‐Trap Memory Based on a MoS₂ Channel for Neuromorphic Engineering

Abstract

Novel memory devices are essential for developing low power, fast, and accurate in‐memory computing and neuromorphic engineering concepts that can compete with the conventional complementary metal−oxide−semiconductor (CMOS) digital processors. 2D semiconductors provide a novel platform for advanced semiconductors with atomic thickness, low‐current operation, and capability of 3D integration. This work presents a charge‐trap memory (CTM) device with a MoS2 channel where memory operation arises, thanks to electron trapping/detrapping at interface states. Transistor operation, memory characteristics, and synaptic potentiation/depression for neuromorphic applications are demonstrated. The CTM device shows outstanding linearity of the potentiation by applied drain pulses of equal amplitude. Finally, pattern recognition is demonstrated by reservoir computing where the input pattern is applied as a stimulation of the MoS2‐based CTMs, while the output current after stimulation is processed by a feedforward readout network. The good accuracy, the low current operation, and the robustness to input random bit flip makes the CTM device a promising technology for future high‐density neuromorphic computing concepts.

2D-Material-Based Volatile and Nonvolatile Memristive Devices for Neuromorphic Computing

“…Moreover, trapping effects based on defects at the interface have been reported. , As shown in Figure j, Islam et al fabricated a 3T synaptic device based on the structure of monolayer MoS 2 /SiO 2 . The Si substrate was regarded as the gate of the device.…”

“…On this basis, synaptic functions, such as LTP/LTD, were successfully mimicked in response to optical and electrical stimulations (Figure l). Similarly, Farronato et al introduced a 3T synaptic transistor based on MoS 2 /SiO 2 . The working mechanism was based on electron trapping/de-trapping at the interface between MoS 2 /SiO 2 .…”

“…Similarly, Farronato et al introduced a 3T synaptic transistor based on MoS 2 /SiO 2 . 228 The working mechanism was based on electron trapping/de-trapping at the interface between MoS 2 /SiO 2 .…”

In-Memory Computing for Machine Learning and Deep Learning

“…2h) consists of a transistor device with a 2D semiconductor material for the channel layer [85]- [87]. The memory behavior can be obtained by migration of dislocations in polycrystalline MoS 2 [88], lateral migration of Ag across the source/drain electrodes [85], or chargetrapping [89]. In some cases, MoS 2 memtransistors display gradual weight-update characteristics that are useful for reservoir computing [89] and training accelerators [90].…”

“…Weight update requires linearity and symmetry of the conductance update under the application of a sequence of identical pulses, in line with the backpropagation algorithm. The best candidate materials to yield a linear weight update are ECRAM devices [125] and MoS 2 -based charge-trap memory [89], [90].…”