Reset-based recovery for real-time cyber-physical systems with temporal safety constraints

Abad, Fardin Abdi Taghi; Mancuso, Renato; Bak, Stanley; Dantsker, Or D.; Caccamo, Marco

doi:10.1109/etfa.2016.7733561

Cited by 26 publications

(15 citation statements)

References 15 publications

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“…References Approaches CPS Abad et al 31 System-level simplex extended technique Mohan et al 32 S3A Easwaran et al 33 Security analysis structure Automotive systems Lin et al 34,35 Security-aware design technique Kiran et al 36 Integrated MILP formulation Apvrille and Roudier 37 SysML-Sec Clusters Xie et al 38 Security overhead model Xie and Qin 39 TAPADS Tripathi et al 40 Schedule algorithm…”

Section: Classi¯cationmentioning

confidence: 99%

“…Recently, the researchers concentrate on developing security-aware energy-e±cient task scheduling mechanisms [20][21][22][23][24][25][26][27][28][29][30] that cannot only promote the system safety performance but also improve the system energy e±ciency. The third category to realize a secure system is investigating the safety issues in speci¯c applications such as cyber-physical systems (CPSs), [31][32][33] automotive systems, [34][35][36][37] clusters, [38][39][40] grids, [41][42][43] etc. Contribution and organization: A large amount of state-of-art approaches designed for security-aware RTES are summarized in this paper.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

A Short Review of Security-Aware Techniques in Real-Time Embedded Systems

Chai

Zhang

Zhou

et al. 2018

J CIRCUIT SYST COMP

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With the rapid development of embedded systems, users and services have been greatly facilitated while also experiencing security threats as a result of cyber-attacks and system vulnerabilities. Currently, the real-time embedded system (RTES) focus is to deal with these security issues. In this paper, we introduce a short review of security-aware techniques for RTES. We mainly discuss two common approaches to improve the security of RTESs. The first approach is achieved by exploring specific attacks. The second approach is realized by deploying security-guaranteed services. However, improving the security of embedded systems may cause excessive energy consumption at the same time. Therefore, we investigate the secure and energy-aware RTESs on a wide range of research. In addition, we study a number of common applications used in secure RETSs. This paper stands for providing awareness and better understanding of the current RTES research status as well as technical theory behind it. Hence, the RTES security issues are resolved.

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Section: Classi¯cationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

A Short Review of Security-Aware Techniques in Real-Time Embedded Systems

Chai

Zhang

Zhou

et al. 2018

J CIRCUIT SYST COMP

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“…Base Controller keeps the system inside a subset of safety region by updating the actuator input at least once after every system restart. In [19], which is variation of System-Level Simplex, authors propose that the complex subsystem can be restarted upon the occurrence of faults. In this design, safe restarting is possible because the back up controller runs on a dedicated processing unit and is not impacted by the restarts in the complex subsystem.…”

Section: Related Workmentioning

confidence: 99%

Restart-based fault-tolerance: System design and schedulability analysis

Abdi

Mancuso

Tabish

et al. 2017

2017 IEEE 23rd International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA)

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Abstract-Embedded systems in safety-critical environments are continuously required to deliver more performance and functionality, while expected to provide verified safety guarantees. Nonetheless, platform-wide software verification (required for safety) is often expensive. Therefore, design methods that enable utilization of components such as real-time operating systems (RTOS), without requiring their correctness to guarantee safety, is necessary.In this paper, we propose a design approach to deploy safe-bydesign embedded systems. To attain this goal, we rely on a small core of verified software to handle faults in applications and RTOS and recover from them while ensuring that timing constraints of safety-critical tasks are always satisfied. Faults are detected by monitoring the application timing and fault-recovery is achieved via full platform restart and software reload, enabled by the short restart time of embedded systems. Schedulability analysis is used to ensure that the timing constraints of critical plant control tasks are always satisfied in spite of faults and consequent restarts. We derive schedulability results for four restart-tolerant task models. We use a simulator to evaluate and compare the performance of the considered scheduling models.

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“…More recently, Bak et al implemented the safety-critical parts of the system-safety controller and decision logic-in FPGA so that it can tolerate systemlevel faults in the computer system running the performance controller for an inverted pendulum and a cardiac pacemaker [14]. [10] is an extension of simplex architecture and Abdi et al showed that a software fault in cyber-physical system can be recovered by restarting the system at runtime. In [12], Abdi et al proposed a novel approach to design a controller that enables the system to restart and remain safe during and after the restart.…”

Section: Related Workmentioning

confidence: 99%

A Simplex Architecture for Intelligent and Safe Unmanned Aerial Vehicles

Vivekanandan

Garcia

Yun

et al. 2016

2016 IEEE 22nd International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA)

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Unmanned Aerial Vehicles (UAVs) are increasingly demanded in civil, military and research purposes. However, they also possess serious threats to the society because faults in UAVs can lead to physical damage or even loss of life. While increasing their intelligence, for example, adding vision-based sense-and-avoid capability, has a potential to reduce the safety threats, increased software complexity and the need for higher computing performance create additional challenges software bugs and transient hardware faults that must be addressed to realize intelligent and safe UAV systems.In this thesis, we present a fault tolerant system design for UAVs. Our proposal is to use two heterogeneous hardware and software platforms with distinct reliability and performance characteristics: High-Assurance (HA) and High-Performance (HP) platforms. The HA platform focuses on simplicity and verifiability in software and uses a simple and transient fault tolerant processor, while the HP platform focuses on intelligence and functionality in software and uses a complex and high performance processor. During the normal operation, the HP platform is responsible for controlling the UAV. However, if it fails due to transient hardware faults or software bugs, the HA platform will take over until the HP platform recovers.We have implemented the proposed design on an actual UAV using a low-cost Arduino and a high-performance Tegra TK1 multi core platform. Our case-studies show that our design can improve safety without compromising performance and intelligence of the UAV.iii

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Reset-based recovery for real-time cyber-physical systems with temporal safety constraints

Cited by 26 publications

References 15 publications

A Short Review of Security-Aware Techniques in Real-Time Embedded Systems

A Short Review of Security-Aware Techniques in Real-Time Embedded Systems

Restart-based fault-tolerance: System design and schedulability analysis

A Simplex Architecture for Intelligent and Safe Unmanned Aerial Vehicles

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