Resistive Crossbars as Approximate Hardware Building Blocks for Machine Learning: Opportunities and Challenges

Chakraborty, Indranil; Ali, Mustafa; Ankit, Aayush; Jain, Shubham; Roy, Sourjya; Sridharan, Shrihari; Agrawal, Amogh; Raghunathan, Anand; Roy, Kaushik

doi:10.1109/jproc.2020.3003007

Cited by 79 publications

(72 citation statements)

References 143 publications

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“…Note that there has been significant amount of research in exploring various other device proposals apart from STT-MRAM and SOT-MRAM for crossbars, such as rectified TMR [136], domain wall motion [137], double-barrier MTJ [138], etc. Although such architectures present excellent energyefficiency, the analog nature of computing introduces errors and approximations, which limits their use to error-tolerant applications only [139]. Moreover, the large area and power overhead of ADCs further limits the use of analog computing to low-precision architectures [140], [141].…”

Section: Discussionmentioning

confidence: 99%

Magnetoresistive Circuits and Systems: Embedded Non-Volatile Memory to Crossbar Arrays

Agrawal

Wang

Sharma

et al. 2021

IEEE Trans. Circuits Syst. I

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This overview article describes Magnetoresistive Random Access Memory (MRAM) from a circuits and systems perspective. We discuss various tradeoffs and design challenges of MRAM in three broad application areas: 1) embedded nonvolatile memory (eNVMs), 2) crossbar-based analog in-memory computing, and 3) stochastic computing. Certain MRAM characteristics, such as high retention, high endurance and fast read and write operations, make them ideal for replacing the standard CMOS memories for last-level cache applications with future scaling. However, various tradeoffs in power, performance and area pose conflicting requirements on MRAM design. We explore these challenges and various circuit techniques that have been developed to mitigate them. Further, we present various requirements of memristive crossbar arrays for accelerating matrixvector-multiplication (MVM) operations in light of MRAM devices, and highlight various challenges, design considerations, and applicability of MRAM as crossbar arrays. Finally, we will elaborate on how inherent stochasticity of MRAM devices can be leveraged for implementing energy-efficient true random number generators (TRNGs) and stochastic units for performing certain tasks, such as developing fast solvers for combinatorial optimization, and stochastic neural networks.

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Section: Discussionmentioning

confidence: 99%

Magnetoresistive Circuits and Systems: Embedded Non-Volatile Memory to Crossbar Arrays

Agrawal

Wang

Sharma

et al. 2021

IEEE Trans. Circuits Syst. I

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“…To train a single-layer Fully Connected Neural Network (FCNN) through a crossbar array, at every iteration, weight update at each synapse connecting input node m with output node n (Fig. 2) is given by the outer product equation [4]: I, for all nine cases, as reflected through the change of V GS . The corresponding power dissipation in the entire VMSC is also plotted (orange plot).…”

Section: Conventional Silicon Mosfet As a Synapsementioning

confidence: 99%

“…For our RRAM crossbar simulation, we have used a popular and established RRAM Verilog-A model of oxide-based RRAM [35]- [38] in SPICE and incorporated the SPICE simulation results in our MATLAB code, like in the case of transistor-based VM synapse. Of all possible NVM synapses, we have chosen the RRAM synapse because recent experimental demonstrations of crossbar arrays often use RRAM as the synapse [4], [6], [7]. Since Phase Change Memory (PCM) has similar asymmetric and non-linear conductance response curve as RRAM, latency and energy consumption for PCM should be similar to RRAM crossbar [2]- [4], [18], [39].…”

Section: Conventional Silicon Mosfet As a Synapsementioning

confidence: 99%

“…So an in-memory computing system like a crossbar array of analog synaptic devices has been considered as a faster and energyefficient alternative to traditional computing systems, with memory-computing separation, for executing these algorithms [2]- [7]. While such a crossbar array can be used for inference (forward computation with pre-trained NN), recently the option of training the NN in the array itself has also been explored -also known as on-chip learning -owing to the advantages it offers for edge devices [4], [8], [9].…”

Section: Introductionmentioning

confidence: 99%

“…In this paper, we propose a new VMSC design which tackles the power dissipation issue faced by Sharda et al [16]. The MOSFET synapse in our designed VMSC store nearly analog values of weight like in any other proposed crossbar [2]- [4], [16]. But here, we have modified the NN-training algorithm such that the weight update is quantized and is limited to two bits only.…”

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

A Crossbar Array of Analog-Digital-Hybrid Volatile Memory Synapse Cells for Energy-Efficient On-Chip Learning

Sharda

Sharma

Bhowmik

2021

2021 IEEE International Symposium on Circuits and Systems (ISCAS)

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Conventional-silicon-transistor-based Volatile Memory (VM) synapse has been proposed as an alternative to Non Volatile Memory (NVM) synapse in crossbar-array-based neuromorphic/ in-memory-computing systems. Here, through SPICE simulations, we have designed an analog-digital-hybrid Volatile Memory Synapse Cell (VMSC) for such a crossbar array of VM synapses. In our VMSC, the transistor synapse stores nearly analog values of weight. But the other transistors, which carry out the weight update for the transistor synapse, are designed following the principle of static CMOS logic (digital), making our design energy-efficient. Through system-level study, we report classification accuracy, speed, and energy consumption for onchip learning on the VMSC-based crossbar designed here, using popular machine learning data sets. We show that despite a low value of capacitance of our MOSFET synapses (low areafootprint hence), the weights are retained in them long enough for our VMSC-based crossbar to exhibit comparable accuracy as a NVM-synapse-based crossbar.

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Bio‐Inspired 3D Artificial Neuromorphic Circuits

Liu

Wang

et al. 2022

Adv Funct Materials

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Neuromorphic circuits emulating the bio‐brain functionality via artificial devices have achieved a substantial scientific leap in the past decade. However, even with the advent of highly advanced bio‐inspired algorithms, the artificial intelligence based on current neuromorphic circuits is lagging behind significantly when compared with naturally evolved biological neural circuits. This massive and intriguing discrepancy is partly due to the incomprehensive understanding of bio‐brain operating mechanism, which relies heavily on the extremely complexed entangled 3D hierarchical neural networks. Configuring 3D neuromorphic hardware with combined computing and memory functionalities, coupled with compatible progress of software algorithms, can be an inevitable route to surmount the limitation encountered by current 2D artificial circuits. Herein, referring to the neuron configuration in 3D perspective together with detailed signal generation and propagation mechanism, the von Neumann configuration is compared with state‐of‐the‐art in‐memory computing architecture, and the development and perspectives of 3D in‐memory computing neuromorphic circuits are highlighted.

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Resistive Crossbars as Approximate Hardware Building Blocks for Machine Learning: Opportunities and Challenges

Cited by 79 publications

References 143 publications

Magnetoresistive Circuits and Systems: Embedded Non-Volatile Memory to Crossbar Arrays

Magnetoresistive Circuits and Systems: Embedded Non-Volatile Memory to Crossbar Arrays

A Crossbar Array of Analog-Digital-Hybrid Volatile Memory Synapse Cells for Energy-Efficient On-Chip Learning

Bio‐Inspired 3D Artificial Neuromorphic Circuits

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