Resolution-based lower bounds in MaxSAT

Li, Chu Min; Manyà, Felip; Mohamedou, Nouredine Ould; Planes, Jordi

doi:10.1007/s10601-010-9097-9

Cited by 36 publications

(22 citation statements)

References 13 publications

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“…The first approach is to perform Branch and Bound search where a lower bound is computed by exploiting the logical structure of the CNF input, e.g., [9,14]. The second approach is to solve the maxsat problem as a sequence of sat problems.…”

Section: Existing Maxsat Solversmentioning

confidence: 99%

Exploiting the Power of mip Solvers in maxsat

Davies

Bacchus

2013

Theory and Applications of Satisfiability Testing – SAT 2013

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Abstract. maxsat is an optimization version of satisfiability. Since many practical problems involve optimization, there are a wide range of potential applications for effective maxsat solvers. In this paper we present an extensive empirical evaluation of a number of maxsat solvers. In addition to traditional maxsat solvers, we also evaluate the use of a state-of-the-art Mixed Integer Program (mip) solver, cplex, for solving maxsat. mip solvers are the most popular technology for solving optimization problems and are also theoretically more powerful than sat solvers. In fact, we show that cplex is quite effective on a range of maxsat instances. Based on these observations we extend a previously developed hybrid approach for solving maxsat, that utilizes both a sat solver and a mip solver. Our extensions aim to take better advantage of the power of the mip solver. The resulting improved hybrid solver is shown to be quite effective.

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Section: Existing Maxsat Solversmentioning

confidence: 99%

Exploiting the Power of mip Solvers in maxsat

Davies

Bacchus

2013

Theory and Applications of Satisfiability Testing – SAT 2013

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“…if the sequence of BCP steps results in a conflict, then the clauses of F 1 that were used to derive the conflict constitute an MUS of F 1 . Thus Proposition 5 is a generalization of [17,Proposition 1] that states that inconsistent subformulas detected by unit propagation are minimally unsatisfiable.…”

Section: Resolution-based Preprocessing Unit Propagationmentioning

confidence: 99%

Formula Preprocessing in MUS Extraction

Belov

Järvisalo

Marques-Silva

2013

Tools and Algorithms for the Construction and Analysis of Systems

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Abstract. Efficient algorithms for extracting minimally unsatisfiable subformulas (MUSes) of Boolean formulas find a wide range of applications in the analysis of systems, e.g., hardware and software bounded model checking. In this paper we study the applicability of preprocessing techniques for Boolean satisfiability (SAT) in the context of MUS extraction. Preprocessing has proven to be extremely important in enabling more efficient SAT solving. Hence the study of the applicability and the effectiveness of preprocessing in MUS extraction is highly relevant. Considering the extraction of both standard and group MUSes, we focus on a number of SAT preprocessing techniques, and formally prove to what extent the techniques can be directly applied in the context of MUS extraction. Furthermore, we develop a generic theoretical framework that captures MUS extraction problems, and enables formalizing conditions for correctness-preserving applications of preprocessing techniques that are not applicable directly. We experimentally evaluate the effect of preprocessing in the context of group MUS extraction.

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“…Given an unsatisfiable CNF instance Φ, the goal of Max-SAT solver is to return an assignment that maximizes the number of satisfiable clauses in Φ [10]. This is a well-known NP-Hard problem.…”

Section: B Partial Max-sat and Application To Design Debuggingmentioning

confidence: 99%

Reviving erroneous stability-based clock-gating using partial Max-SAT

Sengupta

Veneris

2013

2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC)

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The conflicting yet increasing demand for high performance and low power in multi-functional chips has pushed techniques for power reduction to the forefront of VLSI design. Although recent developments have automated most of the low power implementations, designers often manually modify the circuit in order to achieve further power savings. This human intervention is often paved with many errors that are bound to typical logic functional failures. Debugging these errors can be a resource intensive process that requires considerable manual effort. This discourages engineers and achieving power savings at the micro level of the design sometimes remains unrealized. This paper proposes a novel debugging methodology to rectify erroneous clock-gating implementations. With the use of Partial Max-SAT, the method localizes and rectifies the design error introduced in the circuit during a clock-gating implementation. The net effect of the proposed methodology leads to shorter debug time ensuring additional power savings. Extensive experiments on benchmark circuits confirm the effectiveness of the approach.

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Resolution-based lower bounds in MaxSAT

Cited by 36 publications

References 13 publications

Exploiting the Power of mip Solvers in maxsat

Exploiting the Power of mip Solvers in maxsat

Formula Preprocessing in MUS Extraction

Reviving erroneous stability-based clock-gating using partial Max-SAT

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