Resource Management of Manycores with a Hierarchical and a Hybrid Main Memory for MN-MATE Cloud Node

Abstract

The advent of manycore in computing architecture causes severe energy consumption and memory wall problem. Emerging technologies such as on-chip DRAM and nonvolatile memory (NVRAM) receive attention as promising solutions for them. Nonvolatile memory is a viable DRAM replacement, achieving competitive performance at lower power consumption. On-chip DRAM extends the memory bandwidth. The confluence of these trends offers a new opportunity to rethink traditional computing system and memory hierarchies.In an attempt to mitigate the energy and memory wall, we propose MN-MATE, a novel architecture and management techniques for resource allocation of a number of cores, onchip DRAM, and large size of off-chip DRAM and NVRAM. In MN-MATE, each guest OS utilizes cores and various memories allocated by the hypervisor. Based on the knowledge about the allocated resources, a guest OS co-schedules tasks accessing different types of memory with complementary access intensity. Memory management system of the OS utilizes on-chip DRAM as a part of main memory having low latency. It also selects proper location of data from the three types of memory based on the data's access characteristics. Preliminary experimental results show that these techniques with the new architecture improve system performance and reduce energy consumption.Index Terms-virtual machine; resource management; scheduling; NVRAM; hybrid main memory;• A hierarchical main memory management: We propose a software-controlled memory management by the IEEE Eighth World Congress on Services978-0-7695-4756-5/12 $26.00

Dynamic Data Migration in Hybrid Main Memories for In-Memory Big Data Storage

“…The timing, energy, and density characteristics of these memories are taken from [11]- [12] and [19]. The compared methods include PDRAM [7], RaPP [8], PaPA [10], LMRU (a comparative method that moves the least recently used pages from DRAM to NVRAMs and the most recently used pages from NVRAMs to DRAM), and PrBDR -the predicted benefit-based dynamic data migration method proposed in this paper.…”

“…Due to page limitation, we omit the descriptions of these two designs here. Further information, for those interested, can be found in [6]- [10]. In general, the flat design is often preferable to the hierarchical one, although there is no consensus on which design is better [7]- [9].…”

“…Here, hot data is often defined as data that is accessed frequently, while cold data is data that is rarely accessed. The popularly used unit of data migration is an operating system page, typically 4 KB [6]- [10]. Hot data pages in NVRAMs are migrated to DRAM, and cold data pages in DRAM are migrated to NVRAMs.…”

“…In a later study [8], the authors suggested that an NVRAM page should be migrated to DRAM when its sum of read and write frequency values reaches 32. In another work [10], two consecutive accesses make an NVRAM page become hot and two consecutive nonaccesses make a DRAM page become cold, triggering corresponding migrations.…”

Reference Pattern-Aware Instant Memory Balancing for Consolidated Virtual Machineson Manycores

“…This study is a part of the MN-MATE [5], [41], a resource management system for manycores and a hybrid main memory hierarchy of the on-chip DRAM, off-chip DRAM, and off-chip NVRAM to work as a cloud node. The primary purpose of the MN-MATE is to enhance system performance while saving energy by balancing CPU cores and various memories among VMs and by managing allocated resources inside each VM.…”